Language independent automated segmentation of speech using Bach scale filter-banks

This correspondence describes a method for automated segmentation of speech. The method proposed in this paper uses a specially designed filter-bank called Bach filter-bank which makes use of 'music' related perception criteria. The speech signal is treated as continuously time varying signal as against a short time stationary model. A comparative study has been made of the performances using Mel, Bark and Bach scale filter banks. The preliminary results show up to 80 % matches within 20 ms of the manually segmented data, without any information of the content of the text and without any language dependence. The Bach filters are seen to marginally outperform the other filters.

A Simultaneous Deterministic Perturbation Actor-Critic Algorithm with an Application to Optimal Mortgage Refinancing

We develop a simulation-based, two-timescale actor-critic algorithm for infinite horizon Markov decision processes with finite state and action spaces, with a discounted reward criterion. The algorithm is of the gradient ascent type and performs a search in the space of stationary randomized policies. The algorithm uses certain simultaneous deterministic perturbation stochastic approximation (SDPSA) gradient estimates for enhanced performance. We show an application of our algorithm on a problem of mortgage refinancing. Our algorithm obtains the optimal refinancing strategies in a computationally efficient manner

Generation of High Magnetic Fields Using Thyristors

This paper describes the use of high-power thyristors in conjunction with a low-voltage supply for generating pulsed magnetic fields. A modular bank of electrolytic capacitors is charged through a programmable solid-state power supply and then rapidly discharged through a bank of thyristors into a magnetizing coil. The modular construction of capacitor banks enables the discrete control of pulse energy and time. Peak fields up to 15 telsa (150 KOe) and a half period of about 200 microseconds are generated through the discharges. Still higher fields are produced by discharging into a precooled coil ( 77°K). Measurement method for a pulsed field is described.

Comparative study of filter-bank mean-energy distance for automated segmentation of speech signals

This paper describes a method of automated segmentation of speech assuming the signal is continuously time varying rather than the traditional short time stationary model. It has been shown that this representation gives comparable if not marginally better results than the other techniques for automated segmentation. A formulation of the 'Bach' (music semitonal) frequency scale filter-bank is proposed. A comparative study has been made of the performances using Mel, Bark and Bach scale filter banks considering this model. The preliminary results show up to 80 % matches within 20 ms of the manually segmented data, without any information of the content of the text and without any language dependence. 'Bach' filters are seen to marginally outperform the other filters.

A Simple Five-Level Inverter Topology for Induction Motor Drive Using Conventional Two-Level Inverters and Flying Capacitor Technique

This paper proposes a new five-level inverter topology for open-end winding induction motor (IM) drive. The popular existing circuit configurations for five-level inverter include the NPC inverter and flying capacitor topologies. Compared to the NPC inverter, the proposed topology eliminates eighteen clamping diodes having different voltage ratings in the present circuit. Moreover it requires only one capacitor bank per phase, whereas flying capacitor schemes for five level topologies require six capacitor banks per phase. The proposed topology is realized by feeding the phase winding of an open-end induction motor with two-level inverters in series with flying capacitors. The flying capacitor voltages are balanced using the switching state redundancy for full modulation range. The proposed inverter scheme is capable of producing two-level to five-level pulse width modulated voltage across the phase winding depending on the modulation range. Additionally, in case of any switch failure in the flying capacitor connection, the proposed inverter topology can be operated as a three-level inverter for full modulation range. The proposed scheme is experimentally verified on a four pole, 5hp induction motor drive.

In vitro protection of umbilical cord blood-derived primitive hematopoietic stem progenitor cell pool by mannose-specific lectins via antioxidant mechanisms.

BACKGROUND: Earlier we reported that an oral administration of two mannose-specific dietary lectins, banana lectin (BL) and garlic lectin (GL), led to an enhancement of hematopoietic stem and progenitor cell (HSPC) pool in mice. STUDY DESIGN AND METHODS: Cord blood derived CD34+ HSPCs were incubated with BL, GL, Dolichos lectin (DL), or artocarpin lectin (AL) for various time periods in a serum- and growth factor free medium and were subjected to various functional assays. Reactive oxygen species (ROS) levels were detected by using DCHFDA method. Cell fractionation was carried out using lectin-coupled paramagnetic beads. RESULTS: CD34+ cells incubated with the lectins for 10 days gave rise to a significantly higher number of colonies compared to the controls, indicating that all four lectins possessed the capacity to protect HSPCs in vitro. Comparative analyses showed that the protective ability of BL and GL was better than AL and DL and, therefore, further experiments were carried out with them. The output of long-term culture-initiating cell (LTC-IC) and extended LTC-IC assays indicated that both BL and GL protected primitive stem cells up to 30 days. The cells incubated with BL or GL showed a substantial reduction in the ROS levels, indicating that these lectins protect the HSPCs via antioxidant mechanisms. The mononuclear cell fraction isolated by lectin-coupled beads got enriched for primitive HSPCs, as reflected in the output of phenotypic and functional assays.CONCLUSION: The data show that both BL and GL protect the primitive HSPCs in vitro and may also serve as cost-effective HSPC enrichment tools.

The status and use of tree biomass in a semi-arid village ecosystem

The status of the tree biomass resource was investigated in Ungra, a semi-arid village ecosystem in South India. There were 57 tree species with 12 trees capita−1 and 35 trees ha−1. Multiple benefit yielding local tree species dominated the village ecosystem, while fuel only or single end use trees accounted for a small proportion of trees. The standing tree biomass is adequate to meet the requirement of biomass fuels for cooking only for about two years. Village tree biomass is presently being depleted largely for export to urban areas. Tree regeneration is now characterized by transformation from multiple-use local tree species to a few single-use species. A large potential exists for tree biomass production along field boundaries (bunds), stream banks and roadsides. Biomass estimation equations were developed for 10 species.

MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip

The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded DSP is complex and usually custom designed with multiple banks of single-ported or dual ported on-chip scratch pad memory and multiple banks of off-chip memory. Building software for such large complex memories with many of the software components as individually optimized software IPs is a big challenge. In order to obtain good performance and a reduction in memory stalls, the data buffers of the application need to be placed carefully in different types of memory. In this paper we present a unified framework (MODLEX) that combines different data layout optimizations to address the complex DSP memory architectures. Our method models the data layout problem as multi-objective genetic algorithm (GA) with performance and power being the objectives and presents a set of solution points which is attractive from a platform design viewpoint. While most of the work in the literature assumes that performance and power are non-conflicting objectives, our work demonstrates that there is significant trade-off (up to 70%) that is possible between power and performance.

Impact of Sulphate counter ion in the migration of sodium ion through soils

Laboratory advection-diffusion tests are performed on two regional soils-Brown Earth and Red Earth-in order to assess their capacity to control contaminant migration with synthetic contaminant solution of sodium sulphate with sodium concentration of 1000 mg/L. The test was designed to study the transport/attenuation behaviour of sodium in the presence of sulphate. Effective diffusion coefficient (De) that takes into consideration of attenuation processes is used. Cation exchange capacity is an important factor for the attenuation of cationic species. Monovalent sodium ion cannot usually replace other cations and the retention of sodium ion is very less. This is particularly true when chloride is anion is solution. However, sulphate is likely to play a role in the attenuation of sodium. Cation exchange capacity and type of exchangeable ions of soils are likely to play an important role. The effect of sulphate ions on the effective diffusion coefficient of sodium, in two different types of soils, of different cation exchange capacity has been studied. The effective diffusion coefficients of sodium ion for both the soils were calculated using Ogata Bank’s equation. It was shown that effective diffusion coefficient of sodium in the presence of sulphate is lower for Brown Earth than for Red Earth due to exchange of sodium with calcium ions from the exchangeable complex of clay. The soil with the higher cation exchange retained more sodium. Consequently, the breakthrough times and the number of pore volumes of sodium ion increase with the cation exchange capacity of soil.

Banking psychographics: an Indian empirical study

India has been witnessing an economic boom which fuelling a huge growth in the financial sector especially the banks. The spending power and consumerism has been increasing along with the growth in GDP. The numbers of banks are around 3000 (data according to Reserve Bank of India). With a population base of close to 1.1 billion and a diverse culture that has been dictating the mindset and lifestyle of the population, it has been a challenge for the banks to understand the customer better and hence a the need of the hour is a proper psychographic study of retail banking customers.

Determining optimum subband edges for signal compression

The coding gain in subband coding, a popular technique for achieving signal compression, depends on how the input signal spectrum is decomposed into subbands. The optimality of such decomposition is conventionally addressed by designing appropriate filter banks. The issue of optimal decomposition of the input spectrum is addressed by choosing the set of band that, for a given number of bands, will achieve maximum coding gain. A set of necessary conditions for such optimality is derived, and an algorithm to determine the optimal band edges is then proposed. These band edges along with ideal filters, achieve the upper bound of coding gain for a given number of bands. It is shown that with ideal filters, as well as with realizable filters for some given effective length, such a decomposition system performs better than the conventional nonuniform binary tree-structured decomposition in some cases for AR sources as well as images

On-Chip Memory Architecture Exploration Framework for DSP Processor-Based Embedded System on Chip

Today's SoCs are complex designs with multiple embedded processors, memory subsystems, and application specific peripherals. The memory architecture of embedded SoCs strongly influences the power and performance of the entire system. Further, the memory subsystem constitutes a major part (typically up to 70%) of the silicon area for the current day SoC. In this article, we address the on-chip memory architecture exploration for DSP processors which are organized as multiple memory banks, where banks can be single/dual ported with non-uniform bank sizes. In this paper we propose two different methods for physical memory architecture exploration and identify the strengths and applicability of these methods in a systematic way. Both methods address the memory architecture exploration for a given target application by considering the application's data access characteristics and generates a set of Pareto-optimal design points that are interesting from a power, performance and VLSI area perspective. To the best of our knowledge, this is the first comprehensive work on memory space exploration at physical memory level that integrates data layout and memory exploration to address the system objectives from both hardware design and application software development perspective. Further we propose an automatic framework that explores the design space identifying 100's of Pareto-optimal design points within a few hours of running on a standard desktop configuration.

Applying Genetic Algorithms to Optimize Power in Tiled SNUCA Chip Multicore Architectures

We propose a novel technique for reducing the power consumed by the on-chip cache in SNUCA chip multicore platform. This is achieved by what we call a "remap table", which maps accesses to the cache banks that are as close as possible to the cores, on which the processes are scheduled. With this technique, instead of using all the available cache, we use a portion of the cache and allocate lesser cache to the application. We formulate the problem as an energy-delay (ED) minimization problem and solve it offline using a scalable genetic algorithm approach. Our experiments show up to 40% of savings in the memory sub-system power consumption and 47% savings in energy-delay product (ED).

Applying Genetic Algorithms to Optimize Power in Tiled SNUCA Chip Multicore Architectures

We propose a novel technique for reducing the power consumed by the on-chip cache in SNUCA chip multicore platform. This is achieved by what we call a "remap table", which maps accesses to the cache banks that are as close as possible to the cores, on which the processes are scheduled. With this technique, instead of using all the available cache, we use a portion of the cache and allocate lesser cache to the application. We formulate the problem as an energy-delay (ED) minimization problem and solve it offline using a scalable genetic algorithm approach. Our experiments show up to 40% of savings in the memory sub-system power consumption and 47% savings in energy-delay product (ED).

Adaptive power optimization of on-chip SNUCA cache on tiled chip multicore architecture using remap policy

Advances in technology have increased the number of cores and size of caches present on chip multicore platforms(CMPs). As a result, leakage power consumption of on-chip caches has already become a major power consuming component of the memory subsystem. We propose to reduce leakage power consumption in static nonuniform cache architecture(SNUCA) on a tiled CMP by dynamically varying the number of cache slices used and switching off unused cache slices. A cache slice in a tile includes all cache banks present in that tile. Switched-off cache slices are remapped considering the communication costs to reduce cache usage with minimal impact on execution time. This saves leakage power consumption in switched-off L2 cache slices. On an average, there map policy achieves 41% and 49% higher EDP savings compared to static and dynamic NUCA (DNUCA) cache policies on a scalable tiled CMP, respectively.