Some aspects of multilevel load-frequency control of a power system

The application of multilevel control strategies for load-frequency control of interconnected power systems is assuming importance. A large multiarea power system may be viewed as an interconnection of several lower-order subsystems, with possible change of interconnection pattern during operation. The solution of the control problem involves the design of a set of local optimal controllers for the individual areas, in a completely decentralised environment, plus a global controller to provide the corrective signal to account for interconnection effects. A global controller, based on the least-square-error principle suggested by Siljak and Sundareshan, has been applied for the LFC problem. A more recent work utilises certain possible beneficial aspects of interconnection to permit more desirable system performances. The paper reports the application of the latter strategy to LFC of a two-area power system. The power-system model studied includes the effects of excitation system and governor controls. A comparison of the two strategies is also made.

Multilevel load frequency control (a perturbational approach)

A two-level control scheme for the load frequency control of a multi-area power system utilizing certain possible beneficial aspects of interconnections is described in this paper. The problem is identified as the determination of the necessary equivalent perturbation on the control distribution matrix to provide the corrective control.

Some aspects of multilevel load-frequency control of a power system

The application of multilevel control strategies for load-frequency control of interconnected power systems is assuming importance. A large multiarea power system may be viewed as an interconnection of several lower-order subsystems, with possible change of interconnection pattern during operation. The solution of the control problem involves the design of a set of local optimal controllers for the individual areas, in a completely decentralised environment, plus a global controller to provide the corrective signal to account for interconnection effects. A global controller, based on the least-square-error principle suggested by Siljak and Sundareshan, has been applied for the LFC problem. A more recent work utilises certain possible beneficial aspects of interconnection to permit more desirable system performances. The paper reports the application of the latter strategy to LFC of a two-area power system. The power-system model studied includes the effects of excitation system and governor controls. A comparison of the two strategies is also made.

High voltage DC power supply topology for pulsed load applications with converter switching synchronized to load pulses

High voltage power supplies for radar applications are investigated, which are subjected to pulsed load (125 kHz and 10% duty cycle) with stringent specifications (<0.01% regulation, efficiency>85%, droop<0.5 V/micro-sec.). As good regulation and stable operation requires the converter to be switched at much higher frequency than the pulse load frequency, transformer poses serious problems of insulation failure and higher losses. This paper proposes a methodology to tackle the problems associated with this type of application. Synchronization of converter switching with load pulses enables the converter to switch at half the load switching frequency. Low switching frequency helps in ensuring safety of HV transformer insulation and reduction of losses due to skin and proximity effect. Phase-modulated series resonant converter with ZVS is used as the power converter.

Beat frequency oscillations in the output voltage of high voltage DC power supplies under pulsed loading

High voltage power supplies for radar applications are investigated, which are subjected to pulsed load (125 kHz and 10% duty cycle) with stringent specifications (<0.01% regulation, efficiency>85%, droop<0.5 V/micro-sec.). As good regulation and stable operation requires the converter to be switched at much higher frequency than the pulse load frequency, transformer poses serious problems of insulation failure and higher losses. Few converter topologies are proposed to tackle these problems. A study is made regarding the beat frequency oscillations that may exist with pulsed loading. It is illustrated with respect to the proposed converter topologies. Methods are proposed to eliminate or minimize these oscillations.

ELISA: An Estimated Load Information Scheduling Algorithm for Distributed Computing Systems

In this paper, we present a decentralized dynamic load scheduling/balancing algorithm called ELISA (Estimated Load Information Scheduling Algorithm) for general purpose distributed computing systems. ELISA uses estimated state information based upon periodic exchange of exact state information between neighbouring nodes to perform load scheduling. The primary objective of the algorithm is to cut down on the communication and load transfer overheads by minimizing the frequency of status exchange and by restricting the load transfer and status exchange within the buddy set of a processor. It is shown that the resulting algorithm performs almost as well as a perfect information algorithm and is superior to other load balancing schemes based on the random sharing and Ni-Hwang algorithms. A sensitivity analysis to study the effect of various design parameters on the effectiveness of load balancing is also carried out. Finally, the algorithm's performance is tested on large dimensional hypercubes in the presence of time-varying load arrival process and is shown to perform well in comparison to other algorithms. This makes ELISA a viable and implementable load balancing algorithm for use in general purpose distributed computing systems.

Load-Commutated SCR Current-Source-Inverter-Fed Induction Motor Drive With Sinusoidal Motor Voltage and Current

Current source inverter (CSI) is an attractive solution in high-power drives. The conventional gate turn-off thyristor (GTO) based CSI-fed induction motor drives suffer from drawbacks such as low-frequency torque pulsation, harmonic heating, and unstable operation at low-speed ranges. These drawbacks can be overcome by connecting a current-controlled voltage source inverter (VSI) across the motor terminal replacing the bulky ac capacitors. The VSI provides the harmonic currents, which results in sinusoidal motor voltage and current even with the CSI switching at fundamental frequency. This paper proposes a CSI-fed induction motor drive scheme where GTOs are replaced by thyristors in the CSI without any external circuit to assist the turning off of the thyristors. Here, the current-controlled VSI, connected in shunt, is designed to supply the volt ampere reactive requirement of the induction motor, and the CSI is made to operate in leading power factor mode such that the thyristors in the CSI are autosequentially turned off. The resulting drive will be able to feed medium-voltage, high-power induction motors directly. A sensorless vector-controlled CSI drive based on the proposed configuration is developed. The experimental results from a 5 hp prototype are presented. Experimental results show that the proposed drive has stable operation throughout the operating range of speeds.

Switching frequency variation control in hysteresis PWM controller for IM drives using variable parabolic bands for current error space phasor

Variation of switching frequency over the entire operating speed range of an induction motor (M drive is the major problem associated with conventional two-level three-phase hysteresis controller as well as the space phasor based PWM hysteresis controller. This paper describes a simple hysteresis current controller for controlling the switching frequency variation in the two-level PWM inverter fed IM drives for various operating speeds. A novel concept of continuously variable hysteresis boundary of current error space phasor with the varying speed of the IM drive is proposed in the present work. The variable parabolic boundary for the current error space phasor is suggested for the first time in this paper for getting the switching frequency pattern with the hysteresis controller, similar to that of the constant switching frequency voltage-controlled space vector PWM (VC-SVPWM) based inverter fed IM drive. A generalized algorithm is also developed to determine parabolic boundary for controlling the switching frequency variation, for any IM load. Only the adjacent inverter voltage vectors forming a triangular sector, in which tip of the machine voltage vector ties, are switched to keep current error space vector within the parabolic boundary. The controller uses a self-adaptive sector identification logic, which provides smooth transition between the sectors and is capable of taldng the inverter up to six-step mode of operation, if demanded by drive system. The proposed scheme is simulated and experimentally verified on a 3.7 kW IM drive.

Generation of parabolic trajectories for current error space phasor similar to an SVPWM controller for control of switching frequency variation in current hysteresis PWM controlled IM drives

Switching frequency variation over a fundamental period is a major problem associated with hysteresis controller based VSI fed IM drives. This paper describes a novel concept of generating parabolic trajectories for current error space phasor for controlling the switching frequency variation in the hysteresis controller based two-level inverter fed IM drives. A generalized algorithm is developed to determine unique set of parabolic trajectories for different speeds of operation for any given IM load. Proposed hysteresis controller provides the switching frequency spectrum of inverter output voltage, similar to that of the constant switching frequency VC-SVPWM based IM drive. The scheme is extensively simulated and experimentally verified on a 3.7 kW IM drive for steady state and transient performance.

Input voltage modulated high voltage DC power supply topology for pulsed load applications

High voltage power supplies for radar applications are investigated which are subjected to pulsed load with stringent specifications. In the proposed solution, power conversion is done in two stages. A low power-high frequency converter modulates the input voltage of a high power-low frequency converter. This method satisfies all the performance specifications and takes care of the critical aspects of HV transformer.

Hysteresis current controller for a general n-level inverter fed drive with online current error boundary computation and nearly constant switching frequency

A space vector-based hysteresis current controller for any general n-level three phase inverter fed induction motor drive is proposed in this study. It offers fast dynamics, inherent overload protection and low harmonic distortion for the phase voltages and currents. The controller performs online current error boundary calculations and a nearly constant switching frequency is obtained throughout the linear modulation range. The proposed scheme uses only the adjacent voltage vectors of the present sector, similar to space vector pulse-width modulation and exhibits fast dynamic behaviour under different transient conditions. The steps involved in the boundary calculation include the estimation of phase voltages from the current ripple, computation of switching time and voltage error vectors. Experimental results are given to show the performance of the drive at various speeds, effect of sudden change of the load, acceleration, speed reversal and validate the proposed advantages.

On-line Estimation of Fundamental and Ripple Components of Line Currents in a Voltage-Source Inverter Operated at Low Switching Frequency

High-power voltage-source inverters (VSI) are often switched at low frequencies due to switching loss constraints. Numerous low-switching-frequency PWM techniques have been reported, which are quite successful in reducing the total harmonic distortion under open-loop conditions at such low operating frequencies. However, the line current still contains low-frequency components (though of reduced amplitudes), which are fed back to the current loop controller during closed-loop operation. Since the harmonic frequencies are quite low and are not much higher than the bandwidth of the current loop, these are amplified by the current controller, causing oscillations and instability. Hence, only the fundamental current should be fed back. Filtering out these harmonics from the measured current (before feeding back) leads to phase shift and attenuation of the fundamental component, while not eliminating the harmonics totally. This paper proposes a method for on-line extraction of the fundamental current in induction motor drives, modulated with low-switching-frequency PWM. The proposed method is validated through simulations on MATLAB/Simulink. Further, the proposed algorithm is implemented on Cyclone FPGA based controller board. Experimental results are presented for an R-L load.

A Brushless Wound Rotor Induction Generator for Variable Speed Microhydel Plants Without Ballast Load

A new generator topology for microhydel power plants, capable of unsupervised operation, is proposed. While conventional microhydel plants operate at constant speed with switched ballast loads, the proposed generator, based on the wound rotor induction machine, operates at variable speed and does away with the need for ballast loads. This increases reliability and substantially decreases system costs and setup times. The proposed generator has a simplified decoupled control structure with stator-referenced voltage control similar to a conventional synchronous generator, and rotor-side frequency control that is facilitated by rotating electronics mounted on the rotor. While this paper describes an isolated plant, the topology can also be tailored for distributed generation enabling conversion of the available hydraulic power into useful electrical power when the grid is present, and supplying local loads in the event of grid outage.

Evaluation and Minimization of Low-Order Harmonic Torque in Low-Switching-Frequency Inverter-Fed Induction Motor Drives

A low-order harmonic pulsating torque is a major concern in high-power drives, high-speed drives, and motor drives operating in an overmodulation region. This paper attempts to minimize the low-order harmonic torques in induction motor drives, operated at a low pulse number (i.e., a low ratio of switching frequency to fundamental frequency), through a frequency domain (FD) approach as well as a synchronous reference frame (SRF) based approach. This paper first investigates FD-based approximate elimination of harmonic torque as suggested by classical works. This is then extended into a procedure for minimization of low-order pulsating torque components in the FD, which is independent of machine parameters and mechanical load. Furthermore, an SRF-based optimal pulse width modulation (PWM) method is proposed to minimize the low-order harmonic torques, considering the motor parameters and load torque. The two optimal methods are evaluated and compared with sine-triangle (ST) PWM and selective harmonic elimination (SHE) PWM through simulations and experimental studies on a 3.7-kW induction motor drive. The SRF-based optimal PWM results in marginally better performance than the FD-based one. However, the selection of optimal switching angle for any modulation index (M) takes much longer in case of SRF than in case of the FD-based approach. The FD-based optimal solutions can be used as good starting solutions and/or to reasonably restrict the search space for optimal solutions in the SRF-based approach. Both of the FD-based and SRF-based optimal PWM methods reduce the low-order pulsating torque significantly, compared to ST PWM and SHE PWM, as shown by the simulation and experimental results.

A new load distribution strategy for linear network with communication delays

In this paper, we propose a new load distribution strategy called `send-and-receive' for scheduling divisible loads, in a linear network of processors with communication delay. This strategy is designed to optimally utilize the network resources and thereby minimizes the processing time of entire processing load. A closed-form expression for optimal size of load fractions and processing time are derived when the processing load originates at processor located in boundary and interior of the network. A condition on processor and link speed is also derived to ensure that the processors are continuously engaged in load distributions. This paper also presents a parallel implementation of `digital watermarking problem' on a personal computer-based Pentium Linear Network (PLN) topology. Experiments are carried out to study the performance of the proposed strategy and results are compared with other strategies found in literature.