Studies on design, fabrication and reliability assessment of embedded passives on a high-density interconnect (HDI) organic substrate using a sequential build-up process

One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization.This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO3) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm(2). Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (similar to 0.015 at 1 GHz) and proposed low-loss BCB dielectric (similar to 0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo -mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations.Also, a prototype working product with the board level design including features of embedded resistors and capacitors are underway. Preliminary results of these are presented.

Influence of binder solvent on carbon-layer structure in electrical-double-layer capacitors

Porous activated-carbons with a large surface-area have been the most common materials for electrical-double-layer capacitors (EDLCs). These carbons having a wide pore distribution ranges from micropores to macropores in conjunction with a random pore connection that facilitates the high specific-capacitance values. Pore distribution plays a central role in controlling the capacitance value of EDLCs, since electrolyte distribution inside the active material mainly depends on the pore distribution. This has a direct influence on the distribution of resistance and capacitance values within the electrode. As a result, preparation of electrodes remains a vital issue in realising high-performance EDLCs. Generally, carbon materials along with some binders are dispersed into a solvent and coated onto the current collectors. This study examines the role of binder solvents used for the carbon-ink preparation on the microstructure of the electrodes and the consequent performance of the EDLCs. It is observed that the physical properties of the binder solvent namely its dielectric constant, viscosity and boiling point have important role in determining the pore-size distribution as well as the microstructure of electrodes which influence their specific capacitance values.

In situ formation of silver nanowire networks on paper

Simple, universally adaptable techniques for fabricating conductive patterns are required to translate laboratory-scale innovations into low-cost solutions for the developing world. Silver nanostructures have emerged as attractive candidates for forming such conductive patterns. We report here the in situ formation of conductive silver-nanowire networks on paper, thereby eliminating the need for either cost-intensive ink formulation or substrate preparation or complex post-deposition sintering steps. Reminiscent of the photographic process of `salt printing', a desktop office printer was used to deposit desired patterns of silver bromide on paper, which were subsequently exposed to light and then immersed in a photographic developer. Percolating silver nanowire networks that conformally coated the paper fibres were formed after 10 min of exposure to light from a commercial halogen lamp. Thus, conductive and patterned films with sheet resistances of the order of 4 Omega/rectangle can be easily formed by combining two widely used processes - inkjet printing and photographic development.