HFinFET: A Scalable, High Performance, Low Leakage Hybrid n-Channel FET

In this letter, we propose the design and simulation study of a novel transistor, called HFinFET, which is a hybrid of an HEMT and a FinFET, to obtain excellent performance and good OFF-state control. Followed by the description of the design, 3-D device simulation has been performed to predict the characteristics of the device. The device has been benchmarked against published state of the art HEMT as well as planar and nonplanar Si n-MOSFET data of comparable gate length using standard benchmarking techniques.

Estimation of background carrier concentration in fully depleted GaN films

Buffer leakage is an important parasitic loss mechanism in AlGaN/GaN high electron mobility transistors (HEMTs) and hence various methods are employed to grow semi-insulating buffer layers. Quantification of carrier concentration in such buffers using conventional capacitance based profiling techniques is challenging due to their fully depleted nature even at zero bias voltages. We provide a simple and effective model to extract carrier concentrations in fully depleted GaN films using capacitance-voltage (C-V) measurements. Extensive mercury probe C-V profiling has been performed on GaN films of differing thicknesses and doping levels in order to validate this model. Carrier concentrations as extracted from both the conventional C-V technique for partially depleted films having the same doping concentration, and Hall measurements show excellent agreement with those predicted by the proposed model thus establishing the utility of this technique. This model can be readily extended to estimate background carrier concentrations from the depletion region capacitances of HEMT structures and fully depleted films of any class of semiconductor materials.

Curvature Management in Buffer Layer for Device Quality GaN Growth on Si (111)

An efficient buffer layer scheme has been designed to address the issue of curvature management during metalorganic chemical vapour deposition growth of GaN on Si (111) substrate. This is necessary to prevent cracking of the grown layer during post-growth cooling down from growth temperature to room temperature and to achieve an allowable bow (<40 m) in the wafer for carrying out lithographic processes. To meet both these ends simultaneously, the stress evolution in the buffer layers was observed carefully. The reduction in precursor flow during the buffer layer growth provided better control over curvature evolution in the growing buffer layers. This has enabled the growth of a suitable high electron mobility transistor (HEMT) stack on 2'' Si (111) substrate of 300 m thickness with a bow as low as 11.4 m, having a two-dimensional electron gas (2DEG) of mobility, carrier concentration, and sheet resistance values 1510 cm(2)/V-s, 0.96 x 10(13)/cm(2), and 444 /, respectively. Another variation of similar technique resulted in a bow of 23.4 m with 2DEG mobility, carrier concentration, and sheet resistance values 1960 cm(2)/V-s, 0.98 x 10(13)/cm(2), and 325 /, respectively.