241 resultados para Fan-Complete Space
em Indian Institute of Science - Bangalore - Índia
Resumo:
In this paper, we generalize the existing rate-one space frequency (SF) and space-time frequency (STF) code constructions. The objective of this exercise is to provide a systematic design of full-diversity STF codes with high coding gain. Under this generalization, STF codes are formulated as linear transformations of data. Conditions on these linear transforms are then derived so that the resulting STF codes achieve full diversity and high coding gain with a moderate decoding complexity. Many of these conditions involve channel parameters like delay profile (DP) and temporal correlation. When these quantities are not available at the transmitter, design of codes that exploit full diversity on channels with arbitrary DIP and temporal correlation is considered. Complete characterization of a class of such robust codes is provided and their bit error rate (BER) performance is evaluated. On the other hand, when channel DIP and temporal correlation are available at the transmitter, linear transforms are optimized to maximize the coding gain of full-diversity STF codes. BER performance of such optimized codes is shown to be better than those of existing codes.
Resumo:
In this paper, a novel 12-sided polygonal space vector structure is proposed for an induction motor drive. The space vector pattern presented in this paper consists of two 12-sided concentric polygons with the outer polygon having a radius double the inner one. As compared to previously reported 12-sided polygonal space vector structures, this paper subdivides the space vector plane into smaller sized triangles. This helps in reducing the switching frequency of the inverters without deteriorating the output voltage quality. It also reduces the device ratings and dv/dt stress on the devices to half. At the same time, other benefits obtained from the existing 12-sided space vector structure, such as increased linear modulation range and complete elimination of 5th and 7th order harmonics in the phase voltage, are also retained in this paper. The space vector structure is realized by feeding an open-end induction motor with two conventional three-level neutral point clamped (NPC) inverters with asymmetric isolated dc link voltage sources. The neutral point voltage fluctuations in the three-level NPC inverters are eliminated by utilizing the switching state multiplicities for a space vector point. The pulsewidth modulation timings are calculated using sampled reference waveform amplitudes and are explained in detail in this paper. Experimental verification on a laboratory prototype shows that this configuration may be considered suitable for high power drives.
Resumo:
In this two-part series of papers, a generalized non-orthogonal amplify and forward (GNAF) protocol which generalizes several known cooperative diversity protocols is proposed. Transmission in the GNAF protocol comprises of two phases - the broadcast phase and the cooperation phase. In the broadcast phase, the source broadcasts its information to the relays as well as the destination. In the cooperation phase, the source and the relays together transmit a space-time code in a distributed fashion. The GNAF protocol relaxes the constraints imposed by the protocol of Jing and Hassibi on the code structure. In Part-I of this paper, a code design criteria is obtained and it is shown that the GNAF protocol is delay efficient and coding gain efficient as well. Moreover GNAF protocol enables the use of sphere decoders at the destination with a non-exponential Maximum likelihood (ML) decoding complexity. In Part-II, several low decoding complexity code constructions are studied and a lower bound on the Diversity-Multiplexing Gain tradeoff of the GNAF protocol is obtained.
Resumo:
Conformance testing focuses on checking whether an implementation. under test (IUT) behaves according to its specification. Typically, testers are interested it? performing targeted tests that exercise certain features of the IUT This intention is formalized as a test purpose. The tester needs a "strategy" to reach the goal specified by the test purpose. Also, for a particular test case, the strategy should tell the tester whether the IUT has passed, failed. or deviated front the test purpose. In [8] Jeron and Morel show how to compute, for a given finite state machine specification and a test purpose automaton, a complete test graph (CTG) which represents all test strategies. In this paper; we consider the case when the specification is a hierarchical state machine and show how to compute a hierarchical CTG which preserves the hierarchical structure of the specification. We also propose an algorithm for an online test oracle which avoids a space overhead associated with the CTG.
Resumo:
The characteristic function for a contraction is a classical complete unitary invariant devised by Sz.-Nagy and Foias. Just as a contraction is related to the Szego kernel k(S) (z, w) = (1 - z (w) over tilde)(-1) for |z|, |w| < 1, by means of (1/k(S))(T,T*) >= 0, we consider an arbitrary open connected domain Omega in C-n, a complete Pick kernel k on Omega and a tuple T = (T-1, ..., T-n) of commuting bounded operators on a complex separable Hilbert space H such that (1/k)(T,T*) >= 0. For a complete Pick kernel the 1/k functional calculus makes sense in a beautiful way. It turns out that the model theory works very well and a characteristic function can be associated with T. Moreover, the characteristic function is then a complete unitary invariant for a suitable class of tuples T.
Resumo:
This study proposes an inverter circuit topology capable of generating multilevel dodecagonal (12-sided polygon) voltage space vectors by the cascaded connection of two-level and three-level inverters. By the proper selection of DC-link voltages and resultant switching states for the inverters, voltage space vectors whose tips lie on three concentric dodecagons, are obtained. A rectifier circuit for the inverter is also proposed, which significantly improves the power factor. The topology offers advantages such as the complete elimination of the fifth and seventh harmonics in phase voltages and an extension of the linear modulation range. In this study, a simple method for the calculation of pulse width modulation timing was presented along with extensive simulation and experimental results in order to validate the proposed concept.
Resumo:
Dodecagonal (12-sided) space vector pulsewidth modulation (PWM) schemes are characterized by the complete absence of (6n +/- 1)th-order harmonics (for odd n) in the phase voltages, within the linear modulation range and beyond, including over-modulation. This paper presents a new topology suitable for the realization of such multilevel inverter schemes for induction motor (IM) drives, by cascading two-level inverters with flying-capacitor-inverter fed floating H-bridge cells. Now, any standard IM may be used to get the dodecagonal operation which hitherto was possible only with open-end winding IM. To minimize the current total harmonic distortion (THD), a strategy for synchronous PWM is also proposed. It is shown that the proposed method is capable of obtaining better THD figures, compared to conventional dodecagonal schemes. The topology and the PWM strategy are validated through analysis and subsequently verified experimentally.
Resumo:
Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two-level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18-sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three-level inverters. By the proper selection of dc-link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector-based pulsewidth modulation (PWM) techniques are the complete elimination of fifth, seventh, eleventh, and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Experimental results have been presented in this paper to validate the proposed concept.
Resumo:
Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18 sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three level inverters. By proper selection of DC link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector based PWM techniques are the complete elimination of fifth, seventh, eleventh and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Matlab simulation results and experimental results have been presented in this paper to validate the proposed concept.
Resumo:
Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector structure have advantages, such as complete elimination of fifth and seventh harmonics, reduction in electromagnetic interference, reduction in device voltage ratings, reduction of switching frequency, extension of linear modulation range, etc., making it a viable option for high-power medium-voltage drives. This paper proposes two power circuit topologies capable of generating multilevel dodecagonal voltage space vector structure with symmetric triangles (for the first time) with minimum number of dc-link power supplies and floating capacitor H-bridges. The first power topology is composed of two hybrid cascaded five-level inverters connected to either side of an open-end winding induction machine. Each inverter consists of a three-level neutral-point-clamped inverter, which is cascaded with an isolated H-bridge making it a five-level inverter. The second topology is for a normal induction motor. Both of these circuit topologies have inherent capacitor balancing for floating H-bridges for all modulation indexes, including transient operations. The proposed topologies do not require any precharging circuitry for startup. A simple pulsewidth modulation timing calculation method for space vector modulation is also presented in this paper. Due to the symmetric arrangement of congruent triangles within the voltage space vector structure, the timing computation requires only the sampled reference values and does not require any offline computation, lookup tables, or angle computation. Experimental results for steady-state operation and transient operation are also presented to validate the proposed concept.
Resumo:
This paper proposes a technique to suppress low-order harmonics for an open-end winding induction motor drive for a full modulation range. One side of the machine is connected to a main inverter with a dc power supply, whereas the other inverter is connected to a capacitor from the other side. Harmonic suppression (with complete elimination of fifth- and seventh-order harmonics) is achieved by realizing dodecagonal space vectors using a combined pulsewidth modulation (PWM) control for the two inverters. The floating capacitor voltage is inherently controlled during the PWM operation. The proposed PWM technique is shown to be valid for the entire modulation range, including overmodulation and six-step mode of operation of the main inverter. Experimental results have been presented to validate the proposed technique.
Resumo:
Affine transformations have proven to be very powerful for loop restructuring due to their ability to model a very wide range of transformations. A single multi-dimensional affine function can represent a long and complex sequence of simpler transformations. Existing affine transformation frameworks like the Pluto algorithm, that include a cost function for modern multicore architectures where coarse-grained parallelism and locality are crucial, consider only a sub-space of transformations to avoid a combinatorial explosion in finding the transformations. The ensuing practical tradeoffs lead to the exclusion of certain useful transformations, in particular, transformation compositions involving loop reversals and loop skewing by negative factors. In this paper, we propose an approach to address this limitation by modeling a much larger space of affine transformations in conjunction with the Pluto algorithm's cost function. We perform an experimental evaluation of both, the effect on compilation time, and performance of generated codes. The evaluation shows that our new framework, Pluto+, provides no degradation in performance in any of the Polybench benchmarks. For Lattice Boltzmann Method (LBM) codes with periodic boundary conditions, it provides a mean speedup of 1.33x over Pluto. We also show that Pluto+ does not increase compile times significantly. Experimental results on Polybench show that Pluto+ increases overall polyhedral source-to-source optimization time only by 15%. In cases where it improves execution time significantly, it increased polyhedral optimization time only by 2.04x.
Resumo:
This work grew out of an attempt to understand a conjectural remark made by Professor Kyoji Saito to the author about a possible link between the Fox-calculus description of the symplectic structure on the moduli space of representations of the fundamental group of surfaces into a Lie group and pairs of mutually dual sets of generators of the fundamental group. In fact in his paper [3] , Prof. Kyoji Saito gives an explicit description of the system of dual generators of the fundamental group.
Resumo:
For point to point multiple input multiple output systems, Dayal-Brehler-Varanasi have proved that training codes achieve the same diversity order as that of the underlying coherent space time block code (STBC) if a simple minimum mean squared error estimate of the channel formed using the training part is employed for coherent detection of the underlying STBC. In this letter, a similar strategy involving a combination of training, channel estimation and detection in conjunction with existing coherent distributed STBCs is proposed for noncoherent communication in Amplify-and-Forward (AF) relay networks. Simulation results show that the proposed simple strategy outperforms distributed differential space-time coding for AF relay networks. Finally, the proposed strategy is extended to asynchronous relay networks using orthogonal frequency division multiplexing.
Resumo:
The Taylor coefficients c and d of the EM form factor of the pion are constrained using analyticity, knowledge of the phase of the form factor in the time-like region, 4m(pi)(2) <= t <= t(in) and its value at one space-like point, using as input the (g - 2) of the muon. This is achieved using the technique of Lagrange multipliers, which gives a transparent expression for the corresponding bounds. We present a detailed study of the sensitivity of the bounds to the choice of time-like phase and errors present in the space-like data, taken from recent experiments. We find that our results constrain c stringently. We compare our results with those in the literature and find agreement with the chiral perturbation-theory results for c. We obtain d similar to O(10) GeV-6 when c is set to the chiral perturbation-theory values.