Ultracapacitor Based Ride Through System for Control Power Supplies in High Power Converters

High power converters are used in variable speed induction motor drive applications. Riding through a short term power supply glitch is becoming an important requirement in these power converters. The power converter uses a large number of control circuit boards for its operation. The control power supply need to ensure that any glitch in the grid side does not affect any of these control circuit boards. A power supply failure of these control cards results in shut down of the entire system. The paper discusses the ride through system developed to overcome voltage sags and short duration outages at the power supply terminals of the control cards in these converters. A 240VA non-isolated, bi-directional buck-boost converter has been designed to be used along with a stack of ultracapacitors to achieve the same. A micro-controller based digital control platform made use of to achieve the control objective. The design of the ultracapacitor stack and the bidirectional converter is described the performance of the experimental set-up is evaluated.

Computationally efficient models for simulation of non-ideal DC-DC converters operating in continuous and discontinuous conduction modes

This paper discusses dynamic modeling of non-isolated DC-DC converters (buck, boost and buck-boost) under continuous and discontinuous modes of operation. Three types of models are presented for each converter, namely, switching model, average model and harmonic model. These models include significant non-idealities of the converters. The switching model gives the instantaneous currents and voltages of the converter. The average model provides the ripple-free currents and voltages, averaged over a switching cycle. The harmonic model gives the peak to peak values of ripple in currents and voltages. The validity of all these models is established by comparing the simulation results with the experimental results from laboratory prototypes, at different steady state and transient conditions. Simulation based on a combination of average and harmonic models is shown to provide all relevant information as obtained from the switching model, while consuming less computation time than the latter.

Mitigation of lower order harmonics in a grid-connected single-phase PV inverter

In this paper, a simple single-phase grid-connected photovoltaic (PV) inverter topology consisting of a boost section, a low-voltage single-phase inverter with an inductive filter, and a step-up transformer interfacing the grid is considered. Ideally, this topology will not inject any lower order harmonics into the grid due to high-frequency pulse width modulation operation. However, the nonideal factors in the system such as core saturation-induced distorted magnetizing current of the transformer and the dead time of the inverter, etc., contribute to a significant amount of lower order harmonics in the grid current. A novel design of inverter current control that mitigates lower order harmonics is presented in this paper. An adaptive harmonic compensation technique and its design are proposed for the lower order harmonic compensation. In addition, a proportional-resonant-integral (PRI) controller and its design are also proposed. This controller eliminates the dc component in the control system, which introduces even harmonics in the grid current in the topology considered. The dynamics of the system due to the interaction between the PRI controller and the adaptive compensation scheme is also analyzed. The complete design has been validated with experimental results and good agreement with theoretical analysis of the overall system is observed.

Analysis Of The Energy Quantization Effects On Single Electron Inverter Performance Through Noise Margin Modeling

Possible integration of Single Electron Transistor (SET) with CMOS technology is making the study of semiconductor SET more important than the metallic SET and consequently, the study of energy quantization effects on semiconductor SET devices and circuits is gaining significance. In this paper, for the first time, the effects of energy quantization on SET inverter performance are examined through analytical modeling and Monte Carlo simulations. It is observed that the primary effect of energy quantization is to change the Coulomb Blockade region and drain current of SET devices and as a result affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. It is shown that SET inverter designed with CT : CG = 1/3 (where CT and CG are tunnel junction and gate capacitances respectively) offers maximum robustness against energy quantization.

Load-Commutated SCR Current-Source-Inverter-Fed Induction Motor Drive With Sinusoidal Motor Voltage and Current

Current source inverter (CSI) is an attractive solution in high-power drives. The conventional gate turn-off thyristor (GTO) based CSI-fed induction motor drives suffer from drawbacks such as low-frequency torque pulsation, harmonic heating, and unstable operation at low-speed ranges. These drawbacks can be overcome by connecting a current-controlled voltage source inverter (VSI) across the motor terminal replacing the bulky ac capacitors. The VSI provides the harmonic currents, which results in sinusoidal motor voltage and current even with the CSI switching at fundamental frequency. This paper proposes a CSI-fed induction motor drive scheme where GTOs are replaced by thyristors in the CSI without any external circuit to assist the turning off of the thyristors. Here, the current-controlled VSI, connected in shunt, is designed to supply the volt ampere reactive requirement of the induction motor, and the CSI is made to operate in leading power factor mode such that the thyristors in the CSI are autosequentially turned off. The resulting drive will be able to feed medium-voltage, high-power induction motors directly. A sensorless vector-controlled CSI drive based on the proposed configuration is developed. The experimental results from a 5 hp prototype are presented. Experimental results show that the proposed drive has stable operation throughout the operating range of speeds.

A Dual Seven-Level Inverter Supply for an Open-End Winding Induction Motor Drive

This paper develops a seven-level inverter structure for open-end winding induction motor drives. The inverter supply is realized by cascading four two-level and two three-level neutral-point-clamped inverters. The inverter control is designed in such a way that the common-mode voltage (CMV) is eliminated. DC-link capacitor voltage balancing is also achieved by using only the switching-state redundancies. The proposed power circuit structure is modular and therefore suitable for fault-tolerant applications. By appropriately isolating some of the inverters, the drive can be operated during fault conditions in a five-level or a three-level inverter mode, with preserved CMV elimination and DC-link capacitor voltage balancing, within a reduced modulation range.

A Current Source Inverter Fed Induction Motor Drive with Power Factor Angle Control Using Microprocessor

This paper describes a method of adjusting the stator power factor angle for the control of an induction motor fed from a current source inverter (CSI) based on the concept of space vectors (or park vectors). It is shown that under steady state, if the torque angle is kept constant over the entire operating range, it has the advantage of keeping the slip frequency constant. This can be utilized to dispose of the speed feedback and simplify the control scheme for the drive, such that the stator voltage integral zero crossings alone can be used as a feedback for deciding the triggering instants of the CSI thyristors under stable operation of the system. A closed-loop control strategy is developed for the drive based on this principle, using a microprocessor-based control system and is implemented on a laboratory prototype CSI fed induction motor drive.

A New Three-Phase Current Source Inverter with Flexible PWM Capability

A new three-phase current source inverter topology is presented, consisting of three single-phase bridge inverters connected in series and feeding the isolated windings of a standard three-phase induction motor. Because a current zero in one phase now does not affect the others, it enables the implementation of a wide range of current PWM patterns for the reduction and selective elimination of torque pulsations. Furthermore, this system allows for very fast control of the fundamental load current through the use of sinusoidal PWM, a method that was not possible to implement on existing inverter topologies.

A DC-link Capacitor Voltage Balancing with CMV Elimination using only the Switching State Redundancies for a Reduced Switch Count Multi-Level Inverter fed IM Drive

Common mode voltage (CMV) variations in PWM inverter-fed drives generate unwanted shaft and bearing current resulting in early motor failure. Multilevel inverters reduce this problem to some extent, with higher number of levels. But the complexity of the power circuit increases with an increase in the number of inverter voltage levels. In this paper a five-level inverter structure is proposed for open-end winding induction motor (IM) drives, by cascading only two conventional two-level and three-level inverters, with the elimination of the common mode voltage over the entire modulation range. The DC link power supply requirement is also optimized by means of DC link capacitor voltage balancing, with PWM control., using only inverter switching state redundancies. The proposed power circuit gives a simple power bits structure.

A Multilevel Inverter with Hexagonal and 12-sided Polygonal Space Vector Structure for Induction Motor Drive

This paper proposes a multilevel inverter which produces hexagonal voltage space vector structure in lower modulation region and a 12-sided polygonal space vector structure in the over-modulation region. Normal conventional multilevel inverter produces 6n +/- 1 (n=odd) harmonics in the phase voltage during over-modulation and in the extreme square wave mode operation. However, this inverter produces a 12-sided polygonal space vector location leading to the elimination of 6n 1 (n=odd) harmonics in over-modulation region extending to a final 12-step mode operation. The inverter consists of three conventional cascaded two level inverters with asymmetric dc bus voltages. The switching frequency of individual inverters is kept low throughout the modulation index. In the low speed region, hexagonal space phasor based PWM scheme and in the higher modulation region, 12-sided polygonal voltage space vector structure is used. Experimental results presented in this paper shows that the proposed converter is suitable for high power applications because of low harmonic distortion and low switching losses.

A Front end Switched Rectifier DC Source for Neutral Point Balancing of A NPC Three-Level Inverter for The Full Modulation Range

A switched DC voltage three level NPC is proposed in this paper to eliminate capacitor balancing problems in conventional three-level Neutral Point Clamped (NPC) inverter. The proposed configuration requires only one DC link with a voltage V-dc/2, where V-dc is the DC link voltage in a onventional NPC inverter. To get rated DC link voltage (V-dc), the voltage source is alternately onnected in parallel to one of the two series capacitors using two switches and two diodes with device voltage rating of V-dc/2. The frequency at which the voltage source is switched is independent and will not affect the operation of NPC inverter. The switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two level inverter in lower modulation range, thereby increases the reliability of the drive system. A space vector based PWM scheme is used to verify this proposed topology.

High-Frequency Current Source Inverter

The frequency range of the current source inverter (CSI) is limited by the slow commutation process in the inverter circuit. A method to reduce the commutation time and to limit the commutation capacitor voltage is proposed. A brief description of the conventional CSI and a detailed analysis of the commutation intervals of the proposed circuit are given. The experimental waveforms observed in the laboratory verify the validity of the analysis.

Microprocessor Based Sinusoidal PWM Inverter by DMA Transfer

The implementation of three-phase sinusoidal pulse-width-modulated inverter control strategy using microprocessor is discussed in this paper. To save CPU time, the DMA technique is used for transferring the switching pattern from memory to the pulse amplifier and isolation circuits of individual thyristors in the inverter bridge. The method of controlling both voltage and frequency is discussed here.

Modeling and analysis of energy quantization effects on single electron inverter performance

In this paper, for the first time, the effects of energy quantization on single electron transistor (SET) inverter performance are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantization mainly changes the Coulomb blockade region and drain current of SET devices and thus affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new analytical model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. A compact expression is developed for a novel parameter quantization threshold which is introduced for the first time in this paper. Quantization threshold explicitly defines the maximum energy quantization that an SET inverter logic circuit can withstand before its noise margin falls below a specified tolerance level. It is found that SET inverter designed with CT:CG=1/3 (where CT and CG are tunnel junction and gate capacitances, respectively) offers maximum robustness against energy quantization.

Modified current source inverter fed induction motor drive with reduced torque pulsations

A new technique for reducing the torque pulsations in a conventional current source inverter fed induction motor drive is presented. This does not attempt to improve the current waveforms, but modifies the airgap MMF directly. This is based on the use of a motor with two sets of balanced phase windings, with a 30 electrical degree phase difference between them, and each set being fed from a conventional current source inverter. The two inverters are further connected in series so that they can operate from the same current source. As a consequence of this arrangement, the voltage rating of the components of each inverter is reduced, along with reduced torque ripple. This scheme has been experimentally verified and compared with the performance of a conventional scheme.