13 resultados para Automatic surveillence system

em Indian Institute of Science - Bangalore - Índia


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Transliteration system for mobile phone is an area that is always in demand given the difficulties and constraints we face in its implementation. In this paper we deal with automatic transliteration system for Kannada which has a non-uniform geometry and inter-character spacing unlike non-oriental language text like English. So it is even more a challenging problem. Working model consists of part of the process taking place on a mobile with remaining on a server. Good results are achieved.

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Peristaltic pumps were normally used to pump liquids in several chemical and biological applications. In the present study, a peristaltic pump was used to pressurize the chamber (positive as well negative pressures) using atmospheric air. In the present paper, we discuss the development and performance study of an automatic pressurization system to calibrate low range (millibar) pressure sensors. The system includes a peristaltic pump, calibrated pressure sensor (master sensor), pressure chamber, and the control electronics. An in-house developed peristaltic pump was used to pressurize the chamber. A closed loop control system has been developed to detect and adjust the pressure leaks in the chamber. The complete system has been integrated into a portable product. The system performance has been studied for a step response and steady state errors. The system is portable, free from oil contaminants, and consumes less power compared to existing pressure calibration systems. The veracity of the system was verified by calibrating an unknown diaphragm based pressure sensor and the results obtained were satisfactory. (C) 2015 AIP Publishing LLC.

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The paper presents a new criterion for designing a power-system stabiliser, which is that it should cancel the negative damping torque inherent in a synchronous generator and automatic voltage regulator. The method arises from analysis based on the properties of tensor invariance, but it is easily implemented, and leads to the design of an adaptive controller. Extensive computations and simulation have been performed, and laboratory tests have been conducted on a computer-controlled micromachine system. Results are presented illustrating the effectiveness of the adaptive stabiliser.

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We are addressing the problem of jointly using multiple noisy speech patterns for automatic speech recognition (ASR), given that they come from the same class. If the user utters a word K times, the ASR system should try to use the information content in all the K patterns of the word simultaneously and improve its speech recognition accuracy compared to that of the single pattern based speech recognition. T address this problem, recently we proposed a Multi Pattern Dynamic Time Warping (MPDTW) algorithm to align the K patterns by finding the least distortion path between them. A Constrained Multi Pattern Viterbi algorithm was used on this aligned path for isolated word recognition (IWR). In this paper, we explore the possibility of using only the MPDTW algorithm for IWR. We also study the properties of the MPDTW algorithm. We show that using only 2 noisy test patterns (10 percent burst noise at -5 dB SNR) reduces the noisy speech recognition error rate by 37.66 percent when compared to the single pattern recognition using the Dynamic Time Warping algorithm.

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This paper is concerned with the influence of different levels of complexity in modelling various constituent subsystems on the dynamic stability of power systems compensated by static var systems (SVS) operating on pure voltage control. The system components investigated include thyristor controlled reactor (TCR) transients, SVS delays, network transients, the synchronous generator and automatic voltage regulator (AVR). An overall model is proposed which adequately describes the system performance for small signal perturbations. The SVS performance is validated through detailed nonlinear simulation on a physical simulator.

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Formal specification is vital to the development of distributed real-time systems as these systems are inherently complex and safety-critical. It is widely acknowledged that formal specification and automatic analysis of specifications can significantly increase system reliability. Although a number of specification techniques for real-time systems have been reported in the literature, most of these formalisms do not adequately address to the constraints that the aspects of 'distribution' and 'real-time' impose on specifications. Further, an automatic verification tool is necessary to reduce human errors in the reasoning process. In this regard, this paper is an attempt towards the development of a novel executable specification language for distributed real-time systems. First, we give a precise characterization of the syntax and semantics of DL. Subsequently, we discuss the problems of model checking, automatic verification of satisfiability of DL specifications, and testing conformance of event traces with DL specifications. Effective solutions to these problems are presented as extensions to the classical first-order tableau algorithm. The use of the proposed framework is illustrated by specifying a sample problem.

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This paper formulates the automatic generation control (AGC) problem as a stochastic multistage decision problem. A strategy for solving this new AGC problem formulation is presented by using a reinforcement learning (RL) approach This method of obtaining an AGC controller does not depend on any knowledge of the system model and more importantly it admits considerable flexibility in defining the control objective. Two specific RL based AGC algorithms are presented. The first algorithm uses the traditional control objective of limiting area control error (ACE) excursions, where as, in the second algorithm, the controller can restore the load-generation balance by only monitoring deviation in tie line flows and system frequency and it does not need to know or estimate the composite ACE signal as is done by all current approaches. The effectiveness and versatility of the approaches has been demonstrated using a two area AGC model. (C) 2002 Elsevier Science B.V. All rights reserved.

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This paper presents the design and implementation of a learning controller for the Automatic Generation Control (AGC) in power systems based on a reinforcement learning (RL) framework. In contrast to the recent RL scheme for AGC proposed by us, the present method permits handling of power system variables such as Area Control Error (ACE) and deviations from scheduled frequency and tie-line flows as continuous variables. (In the earlier scheme, these variables have to be quantized into finitely many levels). The optimal control law is arrived at in the RL framework by making use of Q-learning strategy. Since the state variables are continuous, we propose the use of Radial Basis Function (RBF) neural networks to compute the Q-values for a given input state. Since, in this application we cannot provide training data appropriate for the standard supervised learning framework, a reinforcement learning algorithm is employed to train the RBF network. We also employ a novel exploration strategy, based on a Learning Automata algorithm,for generating training samples during Q-learning. The proposed scheme, in addition to being simple to implement, inherits all the attractive features of an RL scheme such as model independent design, flexibility in control objective specification, robustness etc. Two implementations of the proposed approach are presented. Through simulation studies the attractiveness of this approach is demonstrated.

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A new automatic generation controller (AGC) design approach, adopting reinforcement learning (RL) techniques, was recently pro- posed [1]. In this paper we demonstrate the design and performance of controllers based on this RL approach for automatic generation control of systems consisting of units having complex dynamics—the reheat type of thermal units. For such systems, we also assess the capabilities of RL approach in handling realistic system features such as network changes, parameter variations, generation rate constraint (GRC), and governor deadband.

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Today's SoCs are complex designs with multiple embedded processors, memory subsystems, and application specific peripherals. The memory architecture of embedded SoCs strongly influences the power and performance of the entire system. Further, the memory subsystem constitutes a major part (typically up to 70%) of the silicon area for the current day SoC. In this article, we address the on-chip memory architecture exploration for DSP processors which are organized as multiple memory banks, where banks can be single/dual ported with non-uniform bank sizes. In this paper we propose two different methods for physical memory architecture exploration and identify the strengths and applicability of these methods in a systematic way. Both methods address the memory architecture exploration for a given target application by considering the application's data access characteristics and generates a set of Pareto-optimal design points that are interesting from a power, performance and VLSI area perspective. To the best of our knowledge, this is the first comprehensive work on memory space exploration at physical memory level that integrates data layout and memory exploration to address the system objectives from both hardware design and application software development perspective. Further we propose an automatic framework that explores the design space identifying 100's of Pareto-optimal design points within a few hours of running on a standard desktop configuration.

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A network of ship-mounted real-time Automatic Weather Stations integrated with Indian geosynchronous satellites Indian National Satellites (INSATs)] 3A and 3C, named Indian National Centre for Ocean Information Services Real-Time Automatic Weather Stations (I-RAWS), is established. The purpose of I-RAWS is to measure the surface meteorological-ocean parameters and transmit the data in real time in order to validate and refine the forcing parameters (obtained from different meteorological agencies) of the Indian Ocean Forecasting System (INDOFOS). Preliminary validation and intercomparison of analyzed products obtained from the National Centre for Medium Range Weather Forecasting and the European Centre for Medium-Range Weather Forecasts using the data collected from I-RAWS were carried out. This I-RAWS was mounted on board oceanographic research vessel Sagar Nidhi during a cruise across three oceanic regimes, namely, the tropical Indian Ocean, the extratropical Indian Ocean, and the Southern Ocean. The results obtained from such a validation and intercomparison, and its implications with special reference to the usage of atmospheric model data for forcing ocean model, are discussed in detail. It is noticed that the performance of analysis products from both atmospheric models is similar and good; however, European Centre for Medium-Range Weather Forecasts air temperature over the extratropical Indian Ocean and wind speed in the Southern Ocean are marginally better.

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Exploiting the performance potential of GPUs requires managing the data transfers to and from them efficiently which is an error-prone and tedious task. In this paper, we develop a software coherence mechanism to fully automate all data transfers between the CPU and GPU without any assistance from the programmer. Our mechanism uses compiler analysis to identify potential stale accesses and uses a runtime to initiate transfers as necessary. This allows us to avoid redundant transfers that are exhibited by all other existing automatic memory management proposals. We integrate our automatic memory manager into the X10 compiler and runtime, and find that it not only results in smaller and simpler programs, but also eliminates redundant memory transfers. Tested on eight programs ported from the Rodinia benchmark suite it achieves (i) a 1.06x speedup over hand-tuned manual memory management, and (ii) a 1.29x speedup over another recently proposed compiler--runtime automatic memory management system. Compared to other existing runtime-only and compiler-only proposals, it also transfers 2.2x to 13.3x less data on average.

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This paper presents the design and implementation of PolyMage, a domain-specific language and compiler for image processing pipelines. An image processing pipeline can be viewed as a graph of interconnected stages which process images successively. Each stage typically performs one of point-wise, stencil, reduction or data-dependent operations on image pixels. Individual stages in a pipeline typically exhibit abundant data parallelism that can be exploited with relative ease. However, the stages also require high memory bandwidth preventing effective utilization of parallelism available on modern architectures. For applications that demand high performance, the traditional options are to use optimized libraries like OpenCV or to optimize manually. While using libraries precludes optimization across library routines, manual optimization accounting for both parallelism and locality is very tedious. The focus of our system, PolyMage, is on automatically generating high-performance implementations of image processing pipelines expressed in a high-level declarative language. Our optimization approach primarily relies on the transformation and code generation capabilities of the polyhedral compiler framework. To the best of our knowledge, this is the first model-driven compiler for image processing pipelines that performs complex fusion, tiling, and storage optimization automatically. Experimental results on a modern multicore system show that the performance achieved by our automatic approach is up to 1.81x better than that achieved through manual tuning in Halide, a state-of-the-art language and compiler for image processing pipelines. For a camera raw image processing pipeline, our performance is comparable to that of a hand-tuned implementation.