Ultrasonic attenuation in strongly disordered electronic systems

The attenuation of long-wavelength phonons due to their interaction with electronic excitations in disordered systems is investigated here. Lattice strain couples to electronic stress, and thus ultrasonic attenuation measures electronic viscosity. The enhancement and critical divergence of electronic viscosity due to localization effects is calculated for the first time. Experimental consequences for the anomalous increase of ultrasonic attenuation in disordered metals close to the metal-insulator transition are discussed. In the localized regime, the appropriate model is one of electronic two-level systems (TLS’s) coupled to phonons. The TLS consists of a pair of states with one localized state occupied and the other unoccupied. The density of such low-excitation-energy TLS’s is nonzero due to long-range Coulomb interactions. The question of whether these could be significant low-energy excitations in glasses is touched upon.

Damage Detection Sensitivity, Specificity and Classification Data Analysis for SHM Systems Design, Verification and Validation

In this paper, we consider applying derived knowledge base regarding the sensitivity and specificity of damage(s) to be detected by an SHM system being designed and qualified. These efforts are necessary toward developing capabilities in SHM system to classify reliably various probable damages through sequence of monitoring, i.e., damage precursor identification, detection of damage and monitoring its progression. We consider the particular problem of visual and ultrasonic NDE based SHM system design requirements, where the damage detection sensitivity and specificity data definitions for a class of structural components are established. Methodologies for SHM system specification creation are discussed in details. Examples are shown to illustrate how the physics of damage detection scheme limits particular damage detection sensitivity and specificity and further how these information can be used in algorithms to combine various different NDE schemes in an SHM system to enhance efficiency and effectiveness. Statistical and data driven models to determine the sensitivity and probability of damage detection (POD) has been demonstrated for plate with varying one-sided line crack using optical and ultrasonic based inspection techniques.

Multi-Tone Testing of Linear and Nonlinear Analog Circuits using Polynomial Coefficients

A method of testing for parametric faults of analog circuits based on a polynomial representation of fault-free function of the circuit is presented. The response of the circuit under test (CUT) is estimated as a polynomial in the applied input voltage at relevant frequencies in addition to DC. Classification or Cur is based on a comparison of the estimated polynomial coefficients with those of the fault free circuit. This testing method requires no design for test hardware as might be added to the circuit fly some other methods. The proposed method is illustrated for a benchmark elliptic filter. It is shown to uncover several parametric faults causing deviations as small as 5% from the nominal values.

Extrinsic Analog Synthesis using Piecewise Linear Current-Mode Circuits

A methodology is presented for the synthesis of analog circuits using piecewise linear (PWL) approximations. The function to be synthesized is divided into PWL segments such that each segment can be realized using elementary MOS current-mode programmable-gain circuits. A number of these elementary current-mode circuits when connected in parallel, it is possible to realize piecewise linear approximation of any arbitrary analog function with in the allowed approximation error bounds. Simulation results show a close agreement between the desired function and the synthesized output. The number of PWL segments used for approximation and hence the circuit area is determined by the required accuracy and the smoothness of the resulting function.

Towards formal verification of analog mixed signal designs using SPICE circuit simulation traces

An extension to a formal verification approach of hybrid systems is proposed to verify analog and mixed signal (AMS) designs. AMS designs can be formally modeled as hybrid systems and therefore lend themselves to the formal analysis and verification techniques applied to hybrid systems. The proposed approach employs simulation traces obtained from an actual design implementation of AMS circuit blocks (for example, in the form of SPICE netlists) to carry out formal analysis and verification. This enables the same platform used for formally validating an abstract model of an AMS design, to be also used for validating its different refinements and design implementation; thereby, providing a simple route to formal verification at different levels of implementation. The feasibility of the proposed approach is demonstrated with a case study based on a tunnel diode oscillator. Since the device characteristic of a tunnel diode is highly non-linear with a negative resistance region, dynamic behavior of circuits in which it is employed as an element is difficult to model, analyze and verify within a general hybrid system formal verification tool. In the case study presented the formal model and the proposed computational techniques have been incorporated into CheckMate, a formal verification tool based on MATLAB and Simulink-Stateflow Framework from MathWorks.

Part II: Design of Well Doping Profile for Improved Breakdown and Mixed-Signal Performance of STI-Type DePMOS Device

Shallow-trench isolation drain extended pMOS (STI-DePMOS) devices show a distinct two-stage breakdown. The impact of p-well and deep-n-well doping profile on breakdown characteristics is investigated based on TCAD simulations. Design guidelines for p-well and deep-n-well doping profile are developed to shift the onset of the first-stage breakdown to a higher drain voltage and to avoid vertical punch-through leading to early breakdown. An optimal ratio between the OFF-state breakdown voltage and the ON-state resistance could be obtained. Furthermore, the impact of p-well/deep-n-well doping profile on the figure of merits of analog and digital performance is studied. This paper aids in the design of STI drain extended MOSFET devices for widest safe operating area and optimal mixed-signal performance in advanced system-on-chip input-output process technologies.

Formal Verification of Full-Wave Rectifier: A Case Study

We present a case study of formal verification of full-wave rectifier for analog and mixed signal designs. We have used the Checkmate tool from CMU [1], which is a public domain formal verification tool for hybrid systems. Due to the restriction imposed by Checkmate it necessitates to make the changes in the Checkmate implementation to implement the complex and non-linear system. Full-wave rectifier has been implemented by using the Checkmate custom blocks and the Simulink blocks from MATLAB from Math works. After establishing the required changes in the Checkmate implementation we are able to efficiently verify, the safety properties of the full-wave rectifier.

Power Optimal Network-on-Chip Interconnect Design

A large part of today's multi-core chips is interconnect. Increasing communication complexity has made essential new strategies for interconnects, such as Network on Chip. Power dissipation in interconnects has become a substantial part of the total power dissipation. Techniques to reduce interconnect power have thus become a necessity. In this paper, we present a design methodology that gives values of bus width for interconnect links, frequency of operation for routers, in Network on Chip scenario that satisfy required throughput and dissipate minimal switching power. We develop closed form analytical expressions for the power dissipation, with bus width and frequency as variables and then use Lagrange multiplier method to arrive at the optimal values. We present a 4 port router in 90 nm technology library as case study. The results obtained from analysis are discussed.

Studies on design, fabrication and reliability assessment of embedded passives on a high-density interconnect (HDI) organic substrate using a sequential build-up process

One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization.This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO3) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm(2). Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (similar to 0.015 at 1 GHz) and proposed low-loss BCB dielectric (similar to 0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo -mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations.Also, a prototype working product with the board level design including features of embedded resistors and capacitors are underway. Preliminary results of these are presented.

Optimization and design of energy transport system for solar cooking application

This paper proposes a hybrid solar cooking system where the solar energy is transported to the kitchen. The thermal energy source is used to supplement the Liquefied Petroleum Gas (LPG) that is in common use in kitchens. Solar energy is transferred to the kitchen by means of a circulating fluid. Energy collected from sun is maximized by changing the flow rate dynamically. This paper proposes a concept of maximum power point tracking (MPPT) for the solar thermal collector. The diameter of the pipe is selected to optimize the overall energy transfer. Design and sizing of different components of the system are explained. Concept of MPPT is validated with simulation and experimental results. (C) 2010 Elsevier Ltd. All rights reserved.

Comparative study of adaptive frequency hopping with power control to avoid WLAN interference in WPAN systems like Bluetooth

Presently Bluetooth(BT) is one of the widely used device for personal communication. As BT devices are operating in the unlicensed ISM band, they are often subjected to the interference from WLAN. The band width of BT (1MHz) is narrower compare to the bandwidth of WLAN (22MHz). So for coexistence purpose it is important to observe the performance of narrow band signal BT in presence of wideband interference WLAN and vice versa. As there are many work on the performance of WLAN in presence BT interference 3]4]5]6], the main focus in this paper is on performance of BT in presence of WLAN interference in AWGN, Rayleigh fading channel. Then comparison of the performance using interference avoidance technique like adaptive frequency hopping, power control for BT system is given. Finally a conclusion is drawn observing the simulation results on the technique which is more suitable for WLAN interference mitigation in BT system.

Modeling and design of a solar thermal system for hybrid cooking application

This paper proposes a hybrid solar cooking system where the solar energy is brought to the kitchen. The energy source is a combination of the solar thermal energy and the Liquefied Petroleum Gas (LPG) that is in common use in kitchens. The solar thermal energy is transferred to the kitchen by means of a circulating fluid. The transfer of solar heat is a twofold process wherein the energy from the collector is transferred first to an intermediate energy storage buffer and the energy is subsequently transferred from the buffer to the cooking load. There are three parameters that are controlled in order to maximize the energy transfer from the collector to the load viz, the fluid flow rate from collector to buffer, fluid flow rate from buffer to load and the diameter of the pipes. This is a complex multi energy domain system comprising energy flow across several domains such as thermal, electrical and hydraulic. The entire system is modeled using the bond graph approach with seamless integration of the power flow in these domains. A method to estimate different parameters of the practical cooking system is also explained. Design and life cycle costing of the system is also discussed. The modeled system is simulated and the results are validated experimentally. (C) 2010 Elsevier Ltd. All rights reserved.

Design & Implementation of IEEE 802.11s Mesh Nodes with enhanced features

This paper describes the implementation of wireless mesh nodes based on the IEEE 802.11s draft where the motivation is to build a real life mesh network. The mesh nodes developed have mesh, mesh access point and mesh portal functionalities simultaneously. The mesh nodes use different radios for mesh and access point functionalities, thus giving better service to client stations. Both reactive and proactive modes of HWMP are supported. The paper also suggests some measures to enhance the performance of the overall network by reducing the number of PREQs.