Optical and Electronic Properties of Conjugated Polymer -Nanocluster Semiconductor Hybrid Systems

Conjugated polymers are intensively pursued as candidate materials for emission and detection devices with the optical range of interest determined by the chemical structure. On the other hand the optical range for emission and detection can also be tuned by size selection in semiconductor nanoclusters. The mechanisms for charge generation and separation upon optical excitation, and light emission are different for these systems. Hybrid systems based on these different class of materials reveal interesting electronic and optical properties and add further insight into the individual characteristics of the different components. Multilayer structures and blends of these materials on different substrates were prepared for absorption, photocurrent (Iph), photoluminescence (PL) and electroluminscence (EL) studies. Polymers chosen were derivatives of polythiophene (PT) and polyparaphenylenevinylene (PPV) along with nanoclusters of cadmium sulphide of average size 4.4 nm (CdS-44). The photocurrent spectral response in these systems followed the absorption response around the band edges for each of the components and revealed additional features, which depended on bias voltage, thickness of the layers and interfacial effects. The current-voltage curves showed multi-component features with emission varying for different regimes of voltage. The emission spectral response revealed additive features and is discussed in terms of excitonic mechanisms.

Role of Management Decision Variables in Determining Technology Progress and Technical Efficiency in Indian Electronic Industry

This paper analyses the influence of management on Technical Efficiency Change (TEC) and Technological Progress (TP) in the communication equipment and consumer electronics sub-sectors of Indian hardware electronics industry. Each sub-sector comprises 13 sample firms for two time periods.The primary objective is to determine the relative contribution of TP and TEC to TFP Growth (TFPG) and to establish the influence of firm specific operational management decision variables on these two components. The study finds that both the sub-sectors have strived and achieved steady TP but not TEC in the period of economic liberalisation to cope with the intensifying competition. The management decisions with respect to asset and profit utilization, vertical integration, among others, improved TP and TE in the sub-sectors. However, R&D investments and technology imports proved costly for TFP indicating inadequate efforts and/or poor resource utilisation by the management. Management was found to be complacent in terms of improving or developing their own technology as indicated by their higher dependence on import of raw materials and no influence of R&D on TP.

Simulation Blocks for TOSSIM-T2"

We develop several hardware and software simulation blocks for the TinyOS-2 (TOSSIM-T2) simulator. The choice of simulated hardware platform is the popular MICA2 mote. While the hardware simulation elements comprise of radio and external flash memory, the software blocks include an environment noise model, packet delivery model and an energy estimator block for the complete system. The hardware radio block uses the software environment noise model to sample the noise floor.The packet delivery model is built by establishing the SNR-PRR curve for the MICA2 system. The energy estimator block models energy consumption by Micro Controller Unit(MCU), Radio,LEDs, and external flash memory. Using the manufacturer’s data sheets we provide an estimate of the energy consumed by the hardware during transmission, reception and also track several of the MCUs states with the associated energy consumption. To study the effectiveness of this work, we take a case study of a paper presented in [1]. We obtain three sets of results for energy consumption through mathematical analysis, simulation using the blocks built into PowerTossim-T2 and finally laboratory measurements. Since there is a significant match between these result sets, we propose our blocks for T2 community to effectively test their application energy requirements and node life times.

Integer Sequence window based Reconfigurable FIR filters

Conventional hardware implementation techniques for FIR filters require the computation of filter coefficients in software and have them stored in memory. This approach is static in the sense that any further fine tuning of the filter requires computation of new coefficients in software. In this paper, we propose an alternate technique for implementing FIR filters in hardware. We store a considerably large number of impulse response coefficients of the ideal filter (having box type frequency response) in memory. We then do the windowing process, on these coefficients, in hardware using integer sequences as window functions. The integer sequences are also generated in hardware. This approach offers the flexibility in fine tuning the filter, like varying the transition bandwidth around a particular cutoff frequency.

Java Memory Model aware Software validation

The Java Memory Model (JMM) provides a semantics of Java multithreading for any implementation platform. The JMM is defined in a declarative fashion with an allowed program execution being defined in terms of existence of "commit sequences" (roughly, the order in which actions in the execution are committed). In this work, we develop OpMM, an operational under-approximation of the JMM. The immediate motivation of this work lies in integrating a formal specification of the JMM with software model checkers. We show how our operational memory model description can be integrated into a Java Path Finder (JPF) style model checker for Java programs.

An Efficient Scheme for Establishing Pairwise Keys for Wireless Sensor Networks

This paper addresses the problem of secure path key establishment in wireless sensor networks that uses the random key pre-distribution technique. Inspired by the recent proxy-based scheme in the work of Ling and Znati (2005) and Li et al. (2005), we introduce a friend-based scheme for establishing pairwise keys securely. We show that the chances of finding friends in a neighbourhood are considerably more than that of finding proxies, leading to lower communication overhead. Further, we prove that the friend-based scheme performs better than the proxy-based scheme both in terms of resilience against node capture as well as in energy consumption for pairwise key establishment, making our scheme more feasible.

On Optimal Performance in Mobile Ad-Hoc Networks

In this paper we are concerned with finding the maximum throughput that a mobile ad hoc network can support. Even when nodes are stationary, the problem of determining the capacity region has long been known to be NP-hard. Mobility introduces an additional dimension of complexity because nodes now also have to decide when they should initiate route discovery. Since route discovery involves communication and computation overhead, it should not be invoked very often. On the other hand, mobility implies that routes are bound to become stale resulting in sub-optimal performance if routes are not updated. We attempt to gain some understanding of these effects by considering a simple one-dimensional network model. The simplicity of our model allows us to use stochastic dynamic programming (SDP) to find the maximum possible network throughput with ideal routing and medium access control (MAC) scheduling. Using the optimal value as a benchmark, we also propose and evaluate the performance of a simple threshold-based heuristic. Unlike the optimal policy which requires considerable state information, the heuristic is very simple to implement and is not overly sensitive to the threshold value used. We find empirical conditions for our heuristic to be near-optimal as well as network scenarios when our simple heuristic does not perform very well. We provide extensive numerical and simulation results for different parameter settings of our model.

Register Allocation and Optimal Spill code Scheduling in Software Pipelined Loops using 0-1 Integer Linear Programming Formulation

In achieving higher instruction level parallelism, software pipelining increases the register pressure in the loop. The usefulness of the generated schedule may be restricted to cases where the register pressure is less than the available number of registers. Spill instructions need to be introduced otherwise. But scheduling these spill instructions in the compact schedule is a difficult task. Several heuristics have been proposed to schedule spill code. These heuristics may generate more spill code than necessary, and scheduling them may necessitate increasing the initiation interval. We model the problem of register allocation with spill code generation and scheduling in software pipelined loops as a 0-1 integer linear program. The formulation minimizes the increase in initiation interval (II) by optimally placing spill code and simultaneously minimizes the amount of spill code produced. To the best of our knowledge, this is the first integrated formulation for register allocation, optimal spill code generation and scheduling for software pipelined loops. The proposed formulation performs better than the existing heuristics by preventing an increase in II in 11.11% of the loops and generating 18.48% less spill code on average among the loops extracted from Perfect Club and SPEC benchmarks with a moderate increase in compilation time.