174 resultados para PWM Converter


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Color displays used in image processing systems consist of a refresh memory buffer storing digital image data which are converted into analog signals to display an image by driving the primary color channels (red, green, and blue) of a color television monitor. The color cathode ray tube (CRT) of the monitor is unable to reproduce colors exactly due to phosphor limitations, exponential luminance response of the tube to the applied signal, and limitations imposed by the digital-to-analog conversion. In this paper we describe some computer simulation studies (using the U*V*W* color space) carried out to measure these reproduction errors. Further, a procedure to correct for color reproduction error due to the exponential luminance response (gamma) of the picture tube is proposed, using a video-lookup-table and a higher resolution digital-to-analog converter. It is found, on the basis of computer simulation studies, that the proposed gamma correction scheme is effective and robust with respect to variations in the assumed value of the gamma.

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Common mode voltage (CMV) variations in PWM inverter-fed drives generate unwanted shaft and bearing current resulting in early motor failure. Multilevel inverters reduce this problem to some extent, with higher number of levels. But the complexity of the power circuit increases with an increase in the number of inverter voltage levels. In this paper a five-level inverter structure is proposed for open-end winding induction motor (IM) drives, by cascading only two conventional two-level and three-level inverters, with the elimination of the common mode voltage over the entire modulation range. The DC link power supply requirement is also optimized by means of DC link capacitor voltage balancing, with PWM control., using only inverter switching state redundancies. The proposed power circuit gives a simple power bits structure.

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Circuits for realizing serial quaternary-to-analogue converters (QACs) are proposed in this paper. Three techniques are presented based on Shannon-Rack decoder, sample/hold serial digital-to-analogue converter and cyclic digital-to-analogue converter. Circuits for the generation of control signals and the multiplexer required in the realization of the QACs are also described. A comparison of the three methods is made.

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A switched DC voltage three level NPC is proposed in this paper to eliminate capacitor balancing problems in conventional three-level Neutral Point Clamped (NPC) inverter. The proposed configuration requires only one DC link with a voltage V-dc/2, where V-dc is the DC link voltage in a onventional NPC inverter. To get rated DC link voltage (V-dc), the voltage source is alternately onnected in parallel to one of the two series capacitors using two switches and two diodes with device voltage rating of V-dc/2. The frequency at which the voltage source is switched is independent and will not affect the operation of NPC inverter. The switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two level inverter in lower modulation range, thereby increases the reliability of the drive system. A space vector based PWM scheme is used to verify this proposed topology.

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Because of growing environmental concerns and increasingly stringent regulations governing auto emissions, new more efficient exhaust catalysts are needed to reduce the amount of pollutants released from internal combustion engines. To accomplish this goal, the major pollutants in exhaust-CO, NOx, and unburned hydrocarbons-need to be fully converted to CO2, N-2, and H2O. Most exhaust catalysts contain nanocrystalline noble metals (Pt, Pd, Rh) dispersed on oxide supports such as Al2O3 or SiO2 promoted by CeO2. However, in conventional catalysts, only the surface atoms of the noble metal particles serve as adsorption sites, and even in 4-6 nm metal particles, only 1/4 to 1/5 of the total noble metal atoms are utilized for catalytic conversion. The complete dispersion of noble metals can be achieved only as ions within an oxide support. In this Account, we describe a novel solution to this dispersion problem: a new solution combustion method for synthesizing dispersed noble metal ionic catalysts. We have synthesized nanocrystalline, single-phase Ce1-xMxO2-delta and Ce1-x-yTiyMxO2-delta (M = Pt, Pd, Rh; x = 0,01-0.02, delta approximate to x, y = 0.15-0.25) oxides in fluorite structure, In these oxide catalysts, pt(2+), Pd2+, or Rh3+ ions are substituted only to the extent of 1-2% of Ce4+ ion. Lower-valent noble metal ion substitution in CeO2 creates oxygen vacancies. Reducing molecules (CO, H-2, NH3) are adsorbed onto electron-deficient noble metal ions, while oxidizing (02, NO) molecules are absorbed onto electron-rich oxide ion vacancy sites. The rates of CO and hydrocarbon oxidation and NOx reduction (with >80% N-2 selectivity) are 15-30 times higher in the presence of these ionic catalysts than when the same amount of noble metal loaded on an oxide support is used. Catalysts with palladium ion dispersed in CeO2 or Ce1-xTixO2 were far superior to Pt or Rh ionic catalysts. Therefore, we have demonstrated that the more expensive Pt and Rh metals are not necessary in exhaust catalysts. We have also grown these nanocrystalline ionic catalysts on ceramic cordierite and have reproduced the results we observed in powder material on the honeycomb catalytic converter. Oxygen in a CeO2 lattice is activated by the substitution of Ti ion, as well as noble metal ions. Because this substitution creates longer Ti-O and M-O bonds relative to the average Ce-O bond within the lattice, the materials facilitate high oxygen storage and release. The interaction among M-0/Mn+, Ce4+/Ce3+, and Ti4+/Ti3+ redox couples leads to the promoting action of CeO2, activation of lattice oxygen and high oxygen storage capacity, metal support interaction, and high rates of catalytic activity in exhaust catalysis.

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An 8085-based microprocessor system readily available in the laboratory has been developed in conjunction with a slow A/D converter to digitize repetitive transient signals arising in a solid-state physics experiment. The unit has been successfully used to measure the domain switching time in ferroelectric crystals, the duration of which is of the order of milliseconds-seconds.

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The short duration of the Doppler signal and noise content in it necessitate a validation scheme to be incorporated in the electronic processor used for frequency measurement, There are several different validation schemes that can be employed in period timing devices. A detailed study of the influence of these validation schemes on the measured frequency has been reported here. These studies were carried out by using a combination of a fast A/D converter and computer. Doppler bursts obtained from an air flow were digitised and stored on magnetic discs. Suitable computer programs were then used to simulate the performance of period timing devices with different validation schemes and the frequency of the stored bursts were evaluated. It is found that best results are obtained when the validation scheme enables frequency measurement to be made over a large number of cycles within the burst.

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The present trend in the industry is towards the use of power transistors in the development of efficient Pulsewidth Modulated (PWM) inverters, because of their operation at high frequency, simplicity of turn-off, and low commutation losses compared to the technology using thyristors. But the protection of power transistors, minimization of switching power loss, and design of base drive circuit are very important for a reliable operation of the system. The requirements, analysis, and a simplified procedure for calculation of the switching-aid network components are presented. The transistor is protected against short circuit using a modified autoregulated and autoprotection drive circuit. The experimental results show that the switching power loss and voltage stress in the device can be reduced by suitable choice of the switching-aid network component values.

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The recent trend towards minimizing the interconnections in large scale integration (LSI) circuits has led to intensive investigation in the development of ternary circuits and the improvement of their design. The ternary multiplexer is a convenient and useful logic module which can be used as a basic building block in the design of a ternary system. This paper discusses a systematic procedure for the simplification and realization of ternary functions using ternary multiplexers as building blocks. Both single level and multilevel multiplexing techniques are considered. The importance of the design procedure is highlighted by considering two specific applications, namely, the development of ternary adder/subtractor and TCD to ternary converter.

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The deviation in the performance of active networks due to practical operational amplifiers (OA) is mainly because of the finite gain bandwidth productBand nonzero output resistanceR_0. The effect ofBandR_0on two OA impedances and single and multi-OA filters are discussed. In filters, the effect ofR_0is to add zeros to the transfer function often making it nonminimum phase. A simple method of analysis has been suggested for 3-OA biquad and coupled biquad circuits. A general method of noise minimization of the generalized impedance converter (GIC), while operating OA's within the prescribed voltage and current limits, is also discussed. The 3-OA biquadratic sections analyzed also exhibit noise behavior and signal handling capacity similar to the GIC. The GIC based structures are found to be better than other configurations both in biquadratic sections and direct realizations of higher order transfer functions.

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Speed control of ac motors requires variable frequency, variable current, or variable voltage supply. Variable frequency supply can be obtained directly from a fixed frequency supply by using a frequency converter or from a dc source using inverters. In this paper a control technique for reference wave adaptive-current generation by modulating the inverter voltage is explained. Extension of this technique for three-phase induction-motor speed control is briefly explained. The oscillograms of the current waveforms obtained from the experimental setup are also shown.

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An isolated wind power generation scheme using slip ring induction machine (SRIM) is proposed. The proposed scheme maintains constant load voltage and frequency irrespective of the wind speed or load variation. The power circuit consists of two back-to-back connected inverters with a common dc link, where one inverter is directly connected to the rotor side of SRIM and the other inverter is connected to the stator side of the SRIM through LC filter. Developing a negative sequence compensation method to ensure that, even under the presence of unbalanced load, the generator experiences almost balanced three-phase current and most of the unbalanced current is directed through the stator side converter is the focus here. The SRIM controller varies the speed of the generator with variation in the wind speed to extract maximum power. The difference of the generated power and the load power is either stored in or extracted from a battery bank, which is interfaced to the common dc link through a multiphase bidirectional fly-back dc-dc converter. The SRIM control scheme, maximum power point extraction algorithm and the fly-back converter topology are incorporated from available literature. The proposed scheme is both simulated and experimentally verified.

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We present a low power gas sensor system on CMOS platform consisting of micromachined polysilicon microheater, temperature controller circuit, resistance readout circuit and SnO2 transducer film. The design criteria for different building blocks of the system is elaborated The microheaters are optimized for temperature uniformity as well as static and dynamic response. The electrical equivalent model for the microheater is derived by extracting thermal and mechanical poles through extensive laser doppler vibrometer measurements. The temperature controller and readout circuit are realized on 130nm CMOS technology The temperature controller re-uses the heater as a temperature sensor and controls the duty cycle of the waveform driving the gate of the power MOSFET which supplies heater current. The readout circuit, with subthreshold operation of the MOSFETs, is based oil resistance to time period conversion followed by frequency to digital converter Subthreshold operatin of MOSFETs coupled with sub-ranging technique, achieves ultra low power consumption with more than five orders of magnitude dynamic range RF sputtered SnO2 film is optimized for its microstructure to achive high sensitivity to sense LPG gas.

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A novel dodecagonal space vector structure for induction motor drive is presented in this paper. It consists of two dodecagons, with the radius of the outer one twice the inner one. Compared to existing dodecagonal space vector structures, to achieve the same PWM output voltage quality, the proposed topology lowers the switching frequency of the inverters and reduces the device ratings to half. At the same time, other benefits obtained from existing dodecagonal space vector structure are retained here. This includes the extension of the linear modulation range and elimination of all 6+/-1 harmonics (n=odd) from the phase voltage. The proposed structure is realized by feeding an open-end winding induction motor with two conventional three level inverters. A detailed calculation of the PWM timings for switching the space vector points is also presented. Simulation and experimental results indicate the possible application of the proposed idea for high power drives.

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A three-level space phasor generation scheme with common mode elimination and with reduced power device count is proposed for an open end winding induction motor in this paper. The open end winding induction motor is fed by the three-level inverters from both sides. Each two level inverter is formed by cascading two two-level inverters. By sharing the bottom inverter for the two three-level inverters on either side, the power device count is reduced. The switching states with zero common mode voltage variation are selected for PWM switching so that there is no alternating common mode voltage in the pole voltages as well as in phase voltages. Only two isolated DC-links, with half the voltage rating of a conventional three-level neutral point clamped inverter, are needed for the proposed scheme.