Ternary adder and subtracter using ternary multiplexer

This paper describes the use of a ternary multiplexer as a building block in the implementation of ternary adders and subtractors and also in the development of ternary coded adders/subtractors.

Implementation of a hybrid PCM encoding scheme

An improved encoding scheme is proposed wherein the quantizer step size incorporates both instantaneous and syllabic adaptation. The information needed to carry out this adaptation is extracted at the coder after the D/A conversion of the digital output, so that the coder and the decoder track each other. A 5-bit coder has been designed and built which has a dynamic range of 38 dB with a constant SNR of 30 dB, and the quality of its output signal is found to be comparable to that of other coding schemes

Microprocessor Based Sinusoidal PWM Inverter by DMA Transfer

The implementation of three-phase sinusoidal pulse-width-modulated inverter control strategy using microprocessor is discussed in this paper. To save CPU time, the DMA technique is used for transferring the switching pattern from memory to the pulse amplifier and isolation circuits of individual thyristors in the inverter bridge. The method of controlling both voltage and frequency is discussed here.

Improving the dynamic range of a CVSD coder

The letter describes a method of improving the dynamic range of a continuously variable slope delta modulator (CVSD). This is achieved by modifying the basic step size delta0 Compared to the CVSD algorithm, the modified CVSD (MCVSD) algorithm yields about 15–20 dB dynamic range improvement without degrading the peak SNR and the bit error rate tolerance.

Protection and Switching-Aid Networks for Transistor Bridge Inverters

The present trend in the industry is towards the use of power transistors in the development of efficient Pulsewidth Modulated (PWM) inverters, because of their operation at high frequency, simplicity of turn-off, and low commutation losses compared to the technology using thyristors. But the protection of power transistors, minimization of switching power loss, and design of base drive circuit are very important for a reliable operation of the system. The requirements, analysis, and a simplified procedure for calculation of the switching-aid network components are presented. The transistor is protected against short circuit using a modified autoregulated and autoprotection drive circuit. The experimental results show that the switching power loss and voltage stress in the device can be reduced by suitable choice of the switching-aid network component values.

Pipeline Analog To Ternary Converter

The paper describes the application of the pipelining principle to the realization of an analogue-to-ternary converter. The circuit shows a considerable saving in hard-ware compared with an earlier proposed circuit. The main hardware components used are analogue comparators, subtractors and the delay elements; hence this method of A/T conversion can operate at a higher sampling frequency.

Observability for a Class of Nonlinear Systems

t - N m and sufficient computable conditions are obtained for the obsemabii of systems with linear state equations and polgwmIal outputs. Based on these, initial state reconstmctors are also described.

Analysis and design of DC blocks

Four types of microstrip coupled line DC blocks are analysed and expressions for the theoretically possible maximum bandwidth for a given ripple are derived. A procedure for designing a DC block to meet a given set of ripple and bandwidth specifications is indicated.

A Simple Multiple pulsewidth Modulated AC Multiple Chopper

A simple multiple pulsewidth modulated (MPWM) ac chopper using power transistors for 3-¿ power control is discussed. 120° chopping period is used for main transistors so that the circuit can accommodate resistive and lagging or leading power factor loads. Only 1-¿ sensing is used for 3-¿ control. An alternate economical power and control schemes for 3-¿ MPWM ac choppers suitable only for resistive loads is also suggested. The experimental results for 12 choppings per cycle are given.

A linear ramp control circuit using two LM 556 dual timers

A simple linear ramp control circuit, suitable for use with force-commutated thyrister circuits is discussed here. The circuit is based on only two IM 558 dual timer iCs, operating from a single 15 V supply. The reset terminals facilitate inhibition of the output of any stage. The use of this circuit in a thyristor chopper operating at 400 Hz 13 described.

A dual-slope analogue-to-digital converter for generating polynomials

A new digital polynomial generator using the principle of dual-slope analogue-to-digital conversion is proposed. Techniques for realizing a wide range of integer as well as fractional coefficients to obtain the desired polynomial have been discussed. The suitability of realizing the proposed polynomial generator in integrated circuit form is also indicated.

Design of Multiloop Controllers for an Ammonia Reactor

The specific objective of this paper is to develop multiloop controllers that would achieve asymptotic regulation in the presence of parameter variations and disturbance inputs for a tubular reactor used in ammonia synthesis. The dynamic model considered here has nine state variables, two control inputs, and two outputs. A systematic procedure for pairing the two inputs with the corresponding two outputs is presented. The two multiloop proportional controllers so configured are designed via the parameter plane method. This economic configuration of controllers maintains the temperature profile almost at the optimal value whereas the point controllers fail to do so.

Microprocessor-Based Field-Oriented Control of A CSI-Fed Induction Motor Drive

This paper describes the method of field orientation of the stator current vector with respect to the stator, mutual, and rotor flux vectors, for the control of an induction motor fed from a current source inverter (CSI). A control scheme using this principle is described for orienting the stator current with respect to the rotor flux, as this gives natural decoupling between the current coordinates. A dedicated microcomputer system developed for implementing this scheme has been described. The experimental results are also presented.

Improvement in Intrusion Detection With Advances in Sensor Fusion

Various intrusion detection systems (IDSs) reported in the literature have shown distinct preferences for detecting a certain class of attack with improved accuracy, while performing moderately on the other classes. In view of the enormous computing power available in the present-day processors, deploying multiple IDSs in the same network to obtain best-of-breed solutions has been attempted earlier. The paper presented here addresses the problem of optimizing the performance of IDSs using sensor fusion with multiple sensors. The trade-off between the detection rate and false alarms with multiple sensors is highlighted. It is illustrated that the performance of the detector is better when the fusion threshold is determined according to the Chebyshev inequality. In the proposed data-dependent decision ( DD) fusion method, the performance optimization of ndividual IDSs is first addressed. A neural network supervised learner has been designed to determine the weights of individual IDSs depending on their reliability in detecting a certain attack. The final stage of this DD fusion architecture is a sensor fusion unit which does the weighted aggregation in order to make an appropriate decision. This paper theoretically models the fusion of IDSs for the purpose of demonstrating the improvement in performance, supplemented with the empirical evaluation.

Very-high-Q inductor simulation for active tuned filters

Abstract is not available.