79 resultados para Ear Protective Devices


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The carrier density dependent current-voltage (J V) characteristics of electrochemically prepared poly(3-methylthiophene) (P3MeT) have been investigated in Pt/P3MeT/Al devices, as a function of temperature from 280 to 84 K. In these devices, the charge transport is found to be mainly governed by different transport regimes of space charge limited conduction (SCLC). In a lightly doped device, SCLC controlled by exponentially distributed traps (Vl+1 law, l > 1) is observed in the intermediate voltage range (0.5-2 V) at all temperatures. However, at higher bias (> 2 V), the current deviates from the usual Vl+1 law where the slope is found to be less than 2 of the logJ-logV plot, which is attributed to the presence of the injection barrier. These deviations gradually disappear at higher doping level due to reduction in the injection barrier. Numerical simulations of the Vl+1 law by introducing the injection barrier show good agreement with experimental data. The results show that carrier density can tune the charge transport mechanism in Pt/P3MeT/Al devices to understand the non-Ohmic behavior. The plausible reasons for the origin of injection barrier and the transitions in the transport mechanism with carrier density are discussed. (C) 2015 AIP Publishing LLC.

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Low-power electronic devices used in digital telecom exchanges are vulnerable to surge voltages and currents primarily originating from natural lightning or due to the direct interactions between electric power and telecommunication lines, etc., causing the earth/ground potential rise, neutral potential rise, and faults in the system. The fault currents may flow directly to telecom lines or through the equipment to the customer's premises, causing adequate damage to the equipment and personnel safety. In wireline applications, analog or digital, central office, exchanges, and subscriber sides have to be protected. Decisive protection and protective methods have to be employed for proper functioning of the equipment under overvoltage/overcurrent conditions. Current investigation reports some interesting results obtained on the recently developed high-voltage high-current protection cards used in digital telecom exchanges. The performances of protection cards both for the ring wave and hybrid wave surges are evaluated and presented. The surge generators required for the investigation are developed and fabricated in house as per the relevant telecom standards.

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The emergence of multiple Dirac cones in hexagonal boron nitride (hBN)-graphene heterostructures is particularly attractive because it offers potentially better landscape for higher and versatile transport properties than the primary Dirac cone. However, the transport coefficients of the cloned Dirac cones is yet not fully characterized and many open questions, including the evolution of charge dynamics and impurity scattering responsible for them, have remained unexplored. Noise measurements, having the potential to address these questions, have not been performed to date in dual-gated hBN graphene hBN devices. Here, we present the low frequency 1/f noise measurements at multiple Dirac cones in hBN encapsulated single and bilayer graphene in dual-gated geometry. Our results reveal that the low-frequency noise in graphene can be tuned by more than two-orders of magnitude by changing carrier concentration as well as by modifying the band structure in bilayer graphene. We find that the noise is surprisingly suppressed at the cloned Dirac cone compared to the primary Dirac cone in single layer graphene device, while it is strongly enhanced for the bilayer graphene with band gap opening. The results are explained with the calculation of dielectric function using tight-binding model. Our results also indicate that the 1/f noise indeed follows the Hooge's empirical formula in hBN-protected devices in dual-gated geometry. We also present for the first time the noise data in bipolar regime of a graphene device.

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We demonstrate all inorganic, robust, cost-effective, spin-coated, two-terminal capacitive memory metal-oxide nanoparticle-oxide-semiconductor devices with cadmium telluride nanoparticles sandwiched between aluminum oxide phosphate layers to form the dielectric memory stack. Using a novel high-speed circuit to decouple reading and writing, experimentally measured memory windows, programming voltages, retention times, and endurance are comparable with or better than the two-terminal memory devices realized using other fabrication techniques.