133 resultados para Decoders (Electronics)


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A switched DC voltage three level NPC is proposed in this paper to eliminate capacitor balancing problems in conventional three-level Neutral Point Clamped (NPC) inverter. The proposed configuration requires only one DC link with a voltage V-dc/2, where V-dc is the DC link voltage in a onventional NPC inverter. To get rated DC link voltage (V-dc), the voltage source is alternately onnected in parallel to one of the two series capacitors using two switches and two diodes with device voltage rating of V-dc/2. The frequency at which the voltage source is switched is independent and will not affect the operation of NPC inverter. The switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two level inverter in lower modulation range, thereby increases the reliability of the drive system. A space vector based PWM scheme is used to verify this proposed topology.

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he performance of an induction motor fed by PWM inverters is mainly determined by the harmonic contents of the output voltage. This paper presents a method of numerically calculating the harmonics in the output voltage waveform. Equal pulse-width modulation and siunsoidal PWM are studied. Analysis has been done for single-phase and three-phase bridge inverters. A systematic procedure is given for computing the harmonics and the results are. tabulated.

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In a letter RauA proposed a new method for designing statefeedback controllers using eigenvalue sensitivity matrices. However, there appears to be a conceptual mistake in the procedure, or else it is unduly restricted in its applicability. In particular the equation — BR~lBTK = A/.I, in which K is a positive-definite symmetric matrix.

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The bit steering technique reduces the number of bits in the partially enrolled mono-phase micro-instruction format. The concurrency matrix aids the detection of bit steering sots of technique-commands. In this paper, the applicability of the bit steering technique to the polyphase microinstruction format is investigated.

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This work explores the electrical properties of p-SnS/n-ITO heterojunction at different temperatures. The p-type SnS film was deposited on n-type ITO substrate using the thermal evaporation technique and its junction properties were studied using two probe method. The as-grown p-n junction exhibited weak rectifying behaviour with a low Saturation current of the order of similar to 10(-6) A. While increasing temperature, the saturation current of the junction is increased and however, its series resistance decreased. At all temperatures the junction exhibited three types of transport mechanisms depending on applied bias-voltage. At lower voltages the junction showed nearly ideal diode characteristics. The junction behaviour with respect to bias-voltage and temperature is discussed with the help of existing theories and energy band diagram.

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Conducting and semiconducting polymers are important materials in the development of printed, flexible, large-area electronics such as flat-panel displays and photovoltaic cells. There has been rapid progress in developing conjugated polymers with high transport mobility required for high-performance field-effect transistors (FETs), beginning(1) with mobilities around 10(-4) cm(2) V-1 s(-1) to a recent report(2) of 1 cm(2) V-1 s(-1) for poly(2,5-bis(3-tetradecylthiophen-2-yl) thieno[3,2-b] thiophene) (PBTTT). Here, the electrical properties of PBTTT are studied at high charge densities both as the semiconductor layer in FETs and in electrochemically doped films to determine the transport mechanism. We show that data obtained using a wide range of parameters (temperature, gate-induced carrier density, source-drain voltage and doping level) scale onto the universal curve predicted for transport in the Luttinger liquid description of the one-dimensional `metal'.

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A learning automaton operating in a random environment updates its action probabilities on the basis of the reactions of the environment, so that asymptotically it chooses the optimal action. When the number of actions is large the automaton becomes slow because there are too many updatings to be made at each instant. A hierarchical system of such automata with assured c-optimality is suggested to overcome that problem.The learning algorithm for the hierarchical system turns out to be a simple modification of the absolutely expedient algorithm known in the literature. The parameters of the algorithm at each level in the hierarchy depend only on the parameters and the action probabilities of the previous level. It follows that to minimize the number of updatings per cycle each automaton in the hierarchy need have only two or three actions.

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A two-level control scheme for the load frequency control of a multi-area power system utilizing certain possible beneficial aspects of interconnections is described in this paper. The problem is identified as the determination of the necessary equivalent perturbation on the control distribution matrix to provide the corrective control.

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This paper describes the implementation of the modified continuously variable slope delta modulator (MCVSD), in which the basic step size δ0 is made to vary as a function of input signal level. The information needed to carry out this is extracted at the local decoder output so that the coder and the decoder track each other. The result is a significant improvement in the dynamic range (about 15dB) as compared to CVSD coder without degrading the peak signal to noise ratio.

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The feasibility of realising a high-order LC filter with a small set of different capacitor values, without sacrificing the frequency response specifications, is indicated. This idea could be conveniently adopted in other filter structures also—for example the FDNR transformed filter realisations.

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A simple ramp control firing circuit, suitable for use with fully controlled, line-commutated thyristor bridge circuits, is discussed here. This circuit uses very few components and generates the synchronized firing pulses in a simple way. It operates from a single 15 V Supply and has an inherent pulse inhibit facility. This circuit provides the synchronized firing pulses for both thyristors of the same limb in a bridge. To ensure reliability, wide triggering pulses are used, which are modulated to pass through the pulse transformers1 and demodulated before being fed to the thyristor gates. The use of throe such circuits only for a three-phase bridge is discussed.

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In this paper, a novel 12-sided polygonal space vector structure is proposed for an induction motor drive. The space vector pattern presented in this paper consists of two 12-sided concentric polygons with the outer polygon having a radius double the inner one. As compared to previously reported 12-sided polygonal space vector structures, this paper subdivides the space vector plane into smaller sized triangles. This helps in reducing the switching frequency of the inverters without deteriorating the output voltage quality. It also reduces the device ratings and dv/dt stress on the devices to half. At the same time, other benefits obtained from the existing 12-sided space vector structure, such as increased linear modulation range and complete elimination of 5th and 7th order harmonics in the phase voltage, are also retained in this paper. The space vector structure is realized by feeding an open-end induction motor with two conventional three-level neutral point clamped (NPC) inverters with asymmetric isolated dc link voltage sources. The neutral point voltage fluctuations in the three-level NPC inverters are eliminated by utilizing the switching state multiplicities for a space vector point. The pulsewidth modulation timings are calculated using sampled reference waveform amplitudes and are explained in detail in this paper. Experimental verification on a laboratory prototype shows that this configuration may be considered suitable for high power drives.

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A novel thermistor-based temperature indicator using an RC oscillator and an up/down counter has been developed and described. The indicator provides linear performance over a wide dynamic temperature range of 0-100°C. This indicator is free from the error due to lead resistances of the thermistor and gives a maximum error of ±0 · 1°C in the range 0-100°C. Test results are given to support the theory.

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A new method of generating polynomials using microprocessors is proposed. The polynomial is generated as a 16-bit digital word. The algorithm for generating a variety of basic 'building block' functions and its implementation is discussed. A technique for generating a generalized polynomial based on the proposed algorithm is indicated. The performance of the proposed generator is evaluated using a commercially available microprocessor kit.

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Instead of waiting for the acknowledgments from all the copies of a single data block sent, as in the optimum generalised stop-and-wait ARQ scheme, the transmitter in the proposed scheme starts sending an optimum number of copies of the next block in the queue, soon after receiving the positive acknowledgment from the receiver, thereby further improving the throughput efficiency.