Small-Signal Stability Analysis of an Open-loop Induction Motor Drive Including the Effect of Inverter Dead-Time

This paper demonstrates light-load instability in open-loop induction motor drives on account of inverter dead-time. The dynamic equations of an inverter fed induction motor, incorporating the effect of dead-time, are considered. A procedure to derive the small-signal model of the motor, including the effect of inverter dead-time, is presented. Further, stability analysis is carried out on a 100-kW, 415V, 3-phase induction motor considering no-load. For voltage to frequency (i.e. V/f) ratios between 0.5 and 1 pu, the analysis brings out regions of instability on the V-f plane, in the frequency range between 5Hz and 20Hz. Simulation and experimental results show sub-harmonic oscillations in the motor current in this region, confirming instability as predicted by the analysis.

An Advanced Gate Driver for Insulated Gate Bipolar Transistors to Eliminate Dead-time Induced Distortions in Inverter Output

Dead-time is introduced between the gating signals to the top and bottom switches in a voltage source inverter (VSI) leg, to prevent shoot through fault due to the finite turn-off times of IGBTs. The dead-time results in a delay when the incoming device is an IGBT, resulting in error voltage pulses in the inverter output voltage. This paper presents the design, fabrication and testing of an advanced gate driver, which eliminates dead-time and consequent output distortion. Here, the gating pulses are generated such that the incoming IGBT transition is not delayed and shoot-through is also prevented. The various logic units of the driver card and fault tolerance of the driver are verified through extensive tests on different topologies such as chopper, half-bridge and full-bridge inverter, and also at different conditions of load. Experimental results demonstrate the improvement in the load current waveform quality with the proposed circuit, on account of elimination of dead-time.

Controlling the cross-section of waveguides inscribed on bulk chalcogenide glasses using fast laser

Waveguides have been fabricated on melt-quenched, bulk chalcogenide glasses using the femto-second laser inscription technique at low repetition rates in the single scan regime. The inscribed waveguides have been characterized by butt-coupling method and the diameter of the waveguide calculated using the mode-field image of the waveguide. The waveguide cross-section symmetry is analyzed using the heat diffusion model by relating the energy and translation speed of the laser. The net-fluence and symmetry of the waveguides are correlated based on the theoretical values and experimental results of guiding cross-section.

An Improved Outer Bound on the Storage-Repair-Bandwidth Tradeoff of Exact-Repair Regenerating Codes

While the tradeoff between the amount of data stored and the repair bandwidth of an (n, k, d) regenerating code has been characterized under functional repair (FR), the case of exact repair (ER) remains unresolved. It is known that there do not exist ER codes which lie on the FR tradeoff at most of the points. The question as to whether one can asymptotically approach the FR tradeoff was settled recently by Tian who showed that in the (4, 3, 3) case, the ER region is bounded away from the FR region. The FR tradeoff serves as a trivial outer bound on the ER tradeoff. In this paper, we extend Tian's results by establishing an improved outer bound on the ER tradeoff which shows that the ER region is bounded away from the FR region, for any (n; k; d). Our approach is analytical and builds upon the framework introduced earlier by Shah et. al. Interestingly, a recently-constructed, layered regenerating code is shown to achieve a point on this outer bound for the (5, 4, 4) case. This represents the first-known instance of an optimal ER code that does not correspond to a point on the FR tradeoff.

A Multi-phase Approach for Improving Information Diffusion in Social Networks

For maximizing influence spread in a social network, given a certain budget on the number of seed nodes, we investigate the effects of selecting and activating the seed nodes in multiple phases. In particular, we formulate an appropriate objective function for two-phase influence maximization under the independent cascade model, investigate its properties, and propose algorithms for determining the seed nodes in the two phases. We also study the problem of determining an optimal budget-split and delay between the two phases.

CROSS-SECTIONAL ANALYSIS OF PRE-TWISTED THICK BEAMS USING VARIATIONAL ASYMPTOTIC METHOD

An asymptotically-exact methodology is presented for obtaining the cross-sectional stiffness matrix of a pre-twisted moderately-thick beam having rectangular cross sections and made of transversely isotropic materials. The anisotropic beam is modeled from 3-D elasticity, without any further assumptions. The beam is allowed to have large displacements and rotations, but small strain is assumed. The strain energy of the beam is computed making use of the constitutive law and the kinematical relations derived with the inclusion of geometrical nonlinearities and initial twist. Large displacements and rotations are allowed, but small strain is assumed. The Variational Asymptotic Method is used to minimize the energy functional, thereby reducing the cross section to a point on the reference line with appropriate properties, yielding a 1-D constitutive law. In this method as applied herein, the 2-D cross-sectional analysis is performed asymptotically by taking advantage of a material small parameter and two geometric small parameters. 3-D strain components are derived using kinematics and arranged as orders of the small parameters. Warping functions are obtained by the minimization of strain energy subject to certain set of constraints that renders the 1-D strain measures well-defined. Closed-form expressions are derived for the 3-D non-linear warping and stress fields. The model is capable of predicting interlaminar and transverse shear stresses accurately up to first order.

Router Attack toward NoC-enabled MPSoC and Monitoring Countermeasures against such Threat

The growing number of applications and processing units in modern Multiprocessor Systems-on-Chips (MPSoCs) come along with reduced time to market. Different IP cores can come from different vendors, and their trust levels are also different, but typically they use Network-on-Chip (NoC) as their communication infrastructure. An MPSoC can have multiple Trusted Execution Environments (TEEs). Apart from performance, power, and area research in the field of MPSoC, robust and secure system design is also gaining importance in the research community. To build a secure system, the designer must know beforehand all kinds of attack possibilities for the respective system (MPSoC). In this paper we survey the possible attack scenarios on present-day MPSoCs and investigate a new attack scenario, i.e., router attack targeted toward NoC architecture. We show the validity of this attack by analyzing different present-day NoC architectures and show that they are all vulnerable to this type of attack. By launching a router attack, an attacker can control the whole chip very easily, which makes it a very serious issue. Both routing tables and routing logic-based routers are vulnerable to such attacks. In this paper, we address attacks on routing tables. We propose different monitoring-based countermeasures against routing table-based router attack in an MPSoC having multiple TEEs. Synthesis results show that proposed countermeasures, viz. Runtime-monitor, Restart-monitor, Intermediate manager, and Auditor, occupy areas that are 26.6, 22, 0.2, and 12.2 % of a routing table-based router area. Apart from these, we propose Ejection address checker and Local monitoring module inside a router that cause 3.4 and 10.6 % increase of a router area, respectively. Simulation results are also given, which shows effectiveness of proposed monitoring-based countermeasures.

Active Power Decoupling with Reduced Converter Stress for Single-Phase Power Conversion and Interfacing

Single-phase DC/AC power electronic converters suffer from pulsating power at double the line frequency. The commonest practice to handle the issue is to provide a huge electrolytic capacitor for smoothening out the ripple. But, the electrolytic capacitors having short end of lifetimes limit the overall lifetime of the converter. Another way of handling the ripple power is by active power decoupling (APD) using the storage devices and a set of semiconductor switches. Here, a novel topology has been proposed implementing APD. The topology claims the benefit of 1) reduced stress on converter switches 2) using smaller capacitance value thus alleviating use of electrolytic capacitor in turn improving the lifetime of the converter. The circuit consists of a third leg, a storage capacitor and a storage inductor. The analysis and the simulation results are shown to prove the effectiveness of the topology.

An Evaluation of the Effectiveness of a Charged Bilayered Conducting Fine Mesh as a Dust Filter

Aim: To develop a mesh meant to be mounted on a windowpane that will act as a barrier for dust, while allowing wind to pass freely. Materials and Methods: Two small metal meshes separated at 1 cm, connected to an electrostatic generator and holding opposite charges are used. A videographic analysis has been performed. Results: The charged bilayered mesh was able to prevent a large portion of dust from passing through. Conclusion: The device is a simple, economical, and reliable way of reducing the entry of dust into a room, easing the need for periodic cleaning, and thus creating a healthier environment for the inhabitants of the building. It also has potential space applications.

Emergent Intelligence Based QoS Routing in MANET

Mobile Ad hoc Networks (MANETs) are self-organized, infrastructureless, decentralized wireless networks consist of a group of heterogeneous mobile devices. Due to the inherent characteristics of MANE -Ts, such as frequent change of topology, nodes mobility, resource scarcity, lack of central control, etc., makes QoS routing is the hardest task. QoS routing is the task of routing data packets from source to destination depending upon the QoS resource constraints, such as bandwidth, delay, packet loss rate, cost, etc. In this paper, we proposed a novel scheme of providing QoS routing in MANETs by using Emergent Intelligence (El). The El is a group intelligence, which is derived from the periodical interaction among a group of agents and nodes. We logically divide MANET into clusters by centrally located static agent, and in each cluster a mobile agent is deployed. The mobile agent interacts with the nodes, neighboring mobile agents and static agent for collection of QoS resource information, negotiations, finding secure and reliable nodes and finding an optimal QoS path from source to destination. Simulation and analytical results show that the effectiveness of the scheme. (C) 2015 The Authors. Published by Elsevier B.V. This is an open access article under the CC BY-NC-ND license (http://creativecommons.ore/licenscs/by-nc-nd/4.0/). Peer-review under responsibility of the Conference Program Chairs

High Performance Modulation of High-Frequency AC Link Inverter

Inverters with high voltage conversion ratio are used in systems with sources such as batteries, photovoltaic (PV) modules or fuel cells. Transformers are often used in such inverters to provide the required voltage conversion ratio and isolation. In this paper, a compact high-frequency (HF) transformer interfaced AC link inverter with lossless snubber is discussed. A high performance synchronized modulation scheme is proposed for this inverter. This modulation addresses the issue of over-voltage spikes due to transformer leakage inductance and it is shown that the circuit can operate safely even when the turn-on delay, such as dead-time, is not used in the HF rectifier section. The problem of spurious turn-on in the HF inverter switches is also mitigated by the proposed modulation method. The circuit performance is validated experimentally with a $900W$ prototype inverter.

Active Power Decoupling with Reduced Converter Stress for Single-Phase Power Conversion and Interfacing

Single-phase DC/AC power electronic converters suffer from pulsating power at double the line frequency. The commonest practice to handle the issue is to provide a huge electrolytic capacitor for smoothening out the ripple. But, the electrolytic capacitors having short end of lifetimes limit the overall lifetime of the converter. Another way of handling the ripple power is by active power decoupling (APD) using the storage devices and a set of semiconductor switches. Here, a novel topology has been proposed implementing APD. The topology claims the benefit of 1) reduced stress on converter switches 2) using smaller capacitance value thus alleviating use of electrolytic capacitor in turn improving the lifetime of the converter. The circuit consists of a third leg, a storage capacitor and a storage inductor. The analysis and the simulation results are shown to prove the effectiveness of the topology.