115 resultados para scanning technology


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Wave pipelining is a design technique for increasing the throughput of a digital circuit or system without introducing pipelining registers between adjacent combinational logic blocks in the circuit/system. However, this requires balancing of the delays along all the paths from the input to the output which comes the way of its implementation. Static CMOS is inherently susceptible to delay variation with input data, and hence, receives a low priority for wave pipelined digital design. On the other hand, ECL and CML, which are amenable to wave pipelining, lack the compactness and low power attributes of CMOS. In this paper we attempt to exploit wave pipelining in CMOS technology. We use a single generic building block in Normal Process Complementary Pass Transistor Logic (NPCPL), modeled after CPL, to achieve equal delay along all the propagation paths in the logic structure. An 8×8 b multiplier is designed using this logic in a 0.8 ?m technology. The carry-save multiplier architecture is modified suitably to support wave pipelining, viz., the logic depth of all the paths are made identical. The 1 mm×0.6 mm multiplier core supports a throughput of 400 MHz and dissipates a total power of 0.6 W. We develop simple enhancements to the NPCPL building blocks that allow the multiplier to sustain throughputs in excess of 600 MHz. The methodology can be extended to introduce wave pipelining in other circuits as well

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Differential scanning calorimetry studies have been performed on GexSb5Se95-x (12.5≤x≤35) and GexSb10Se90-x (10≤x≤32.5) glasses. The observed dependence of the glass transition temperature on the mean coordination number up to =2.60 and the maxima in the glass transition temperature and the activation energy of crystallisation at =2.65 have been interpreted in terms of the mechanical and chemical thresholds occuring near these compositions.

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Bulk glasses of Ge(20)Se(80-x)ln(x) (O less than or equal to x less than or equal to 18) have been used for measurements of heat capacity at constant pressure (C-p) using a differential scanning calorimeter. These measurements reveal the chemical threshold in these glasses as a function of composition. The results are discussed in the light of microscopic phase separation in these glasses.

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A scanning tunneling microscopy study of carbon nanocapsules (onions) is reported for the first time. Spherulitic graphite is shown to be purely crystalline graphite based on X-ray diffraction and electron microscopy studies.

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Recent advances in nonsilica fiber technology have prompted the development of suitable materials for devices operating beyond 1.55 mu m. The III-V ternaries and quaternaries (AlGaIn)(AsSb) lattice matched to GaSb seem to be the obvious choice and have turned out to be promising candidates for high speed electronic and long wavelength photonic devices. Consequently, there has been tremendous upthrust in research activities of GaSb-based systems. As a matter of fact, this compound has proved to be an interesting material for both basic and applied research. At present, GaSb technology is in its infancy and considerable research has to be carried out before it can be employed for large scale device fabrication. This article presents an up to date comprehensive account of research carried out hitherto. It explores in detail the material aspects of GaSb starting from crystal growth in bulk and epitaxial form, post growth material processing to device feasibility. An overview of the lattice, electronic, transport, optical and device related properties is presented. Some of the current areas of research and development have been critically reviewed and their significance for both understanding the basic physics as well as for device applications are addressed. These include the role of defects and impurities on the structural, optical and electrical properties of the material, various techniques employed for surface and bulk defect passivation and their effect on the device characteristics, development of novel device structures, etc. Several avenues where further work is required in order to upgrade this III-V compound for optoelectronic devices are listed. It is concluded that the present day knowledge in this material system is sufficient to understand the basic properties and what should be more vigorously pursued is their implementation for device fabrication. (C) 1997 American Institute of Physics.

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The aim of logic synthesis is to produce circuits which satisfy the given boolean function while meeting timing constraints and requiring the minimum silicon area. Logic synthesis involves two steps namely logic decomposition and technology mapping. Existing methods treat the two as separate operation. The traditional approach is to minimize the number of literals without considering the target technology during the decomposition phase. The decomposed expressions are then mapped on to the target technology to optimize the area, Timing optimization is carried out subsequently, A new approach which treats logic decomposition and technology maping as a single operation is presented. The logic decomposition is based on the parameters of the target technology. The area and timing optimization is carried out during logic decomposition phase itself. Results using MCNC circuits are presented to show that this method produces circuits which are 38% faster while requiring 14% increase in area.

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A series of 2-haloethoxyethyl cholesteryl ethers has been synthesized. Each material shows attractive liquid-crystalline properties as revealed by differential scanning calorimetry, polarizing microscopy, and temperature-dependence of selective reflection characteristic of the cholesteric mesophase. These are interesting examples of simple, nonpolymeric, single component systems that show the cholesteric mesophase at room temperature.

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An isothermal section of the phase diagram for the system Eu - Pd - O at 1223 K has been established by equilibration of samples representing 20 different compositions, and phase identification after quenching by optical and scanning electron microscopy, X-ray powder diffraction, and energy dispersive spectroscopy. Three ternary oxides, Eu4PdO7, Eu2PdO4, and Eu2Pd2O5, were identified. Liquid alloys and the intermetallic compounds EuPd2 and EuPd3 were found to be in equilibrium with EuO. The compound EuPd3 was also found to coexist separately with Eu3O4 and Eu2O3. The oxide phase in equilibrium with EuPd5 and Pd rich solid solution was Eu2O3. Based on the phase relations, four solid state cells were designed to measure the Gibbs energies of formation of the three ternary oxides in the temperature range from 925 to 1350 K. Although three cells are sufficient to obtain the properties of the three compounds, the fourth cell was deployed to crosscheck the data. An advanced version of the solid state cell incorporating a buffer electrode with yttria stabilised zirconia solid electrolyte and pure oxygen gas at a pressure of 0.1 MPa as the reference electrode was used for high temperature thermodynamic measurements. Equations for the standard Gibbs energy of formation of the interoxide compounds from their component binary oxides Eu2O3 with C type structure and PdO have been established. Based on the thermodynamic information, isothermal chemical potential diagrams and isobaric phase diagrams for the system Eu - Pd - O have been developed.

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A study of the deposition of aluminium oxide films by low-pressure metalorganic chemical vapour deposition from the complex aluminium acetylacetonate, in the absence of an oxidant gas, has been carried out. Depositions on to Si(100), stainless steel, and TiN-coated cemented carbide are found to be smooth, shiny, and blackish. SIMS, XPS and TEM analyses reveal that films deposited at temperatures as low as 600 degreesC contain small crystallites Of kappa-Al2O3, embedded in an amorphous matrix rich in graphitic carbon. Optical and scanning electron microscopy reveal a surface morphology made up of spherulites that suggests that film growth might involve a melting process. A nucleation and growth mechanism, involving the congruent melting clusters of precursor molecules on the hot substrate surface, is therefore invoked to explain these observations. An effort has been made experimentally to verify this proposed mechanism. (C) 2002 Elsevier Science B.V. All rights reserved.

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This article explores issues and challenges in the field of education in nanoscience and technology with special emphasis with respect to India, where an expanding programme of research in nano science and technology is in place. The article does not concentrate on actual curricula that are needed in nano science and technology education course. Rather it focuses on the desirability of nanoscience and technology education at different levels of education and future prospect of students venturing into this within the economic and cultural milieu of India. We argue that care is needed in developing the education programme in India. However, the risk is worth taking as the education on nanoscience and technology can bridge the man power gap not only in this area of technology but also related technologies of hardware and micro electronics for which the country is a promising destination at global level. This will also unlock the demographical advantage that India will enjoy in the next five decades.

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We have investigated the local electronic properties and the spatially resolved magnetoresistance of a nanostructured film of a colossal magnetoresistive (CMR) material by local conductance mapping (LCMAP) using a variable temperature Scanning Tunneling Microscope (STM) operating in a magnetic field. The nanostructured thin films (thickness ≈500nm) of the CMR material La0.67Sr0.33MnO3 (LSMO) on quartz substrates were prepared using chemical solution deposition (CSD) process. The CSD grown films were imaged by both STM and atomic force microscopy (AFM). Due to the presence of a large number of grain boundaries (GB's), these films show low field magnetoresistance (LFMR) which increases at lower temperatures. The measurement of spatially resolved electronic properties reveal the extent of variation of the density of states (DOS) at and close to the Fermi level (EF) across the grain boundaries and its role in the electrical resistance of the GB. Measurement of the local conductance maps (LCMAP) as a function of magnetic field as well as temperature reveals that the LFMR occurs at the GB. While it was known that LFMR in CMR films originates from the GB, this is the first investigation that maps the local electronic properties at a GB in a magnetic field and traces the origin of LFMR at the GB.

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We have investigated the effect of biaxial strain on local electrical/electronic properties in thin films of La0.7Ca0.3MnO3 with varying degrees of biaxial strain in them. The local electrical properties were investigated as a function of temperature by scanning tunneling spectroscopy (STS) and scanning tunneling potentiometry (STP), along with the bulk probe like conductance fluctuations.The results indicate a positive correlation between the lattice mismatch biaxial strain and the local electrical/electronic inhomogenities observed in the strained sample. This is plausible since the crystal structure of the manganites interfere rather strongly with the magnetic/electronic degrees of freedom. Thus even a small imbalance (biaxial strain) can induce significant changes in the electrical properties of the system.

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To investigate the role of grain boundaries and other growth related microstructure in manganite films, a scanning tunneling microscope is used to simultaneously probe surface topography and local potential distribution under current flow at nanometer level in films of epitaxial thin films of La0.7Ca0.3MnO3 deposited on single crystal SrTiO3 and NdGaO3 substrate by laser ablation. We have studied two types of films strained and strain relaxed. Thin (50nm) films (strained due to lattice mismatch between substrate and the film) show step growth (unit cell steps) and have very smooth surfaces. Relatively thicker films (strain relaxed, thickness 200nm) do not have these step growths and show rather smooth well connected grains. Charge transport in these films is not uniform on the nanometer level and is accompanied by potential jumps at the internal surfaces. In particular scattering from grain boundaries results in large variations in the local potential resulting in fields as high as 104-105V/cm located near the grain boundaries. We discuss the role of local strain and strain inhomogeneties in determining the current transport in these films and their resistance and magnetoresistivity. In this paper we attempt to correlate between bulk electronic properties with microscopic electronic conduction using scanning tunneling microscopy and scanning tunneling potentiometry.

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This paper analyses the influence of management on Technical Efficiency Change (TEC) and Technological Progress (TP) in the communication equipment and consumer electronics sub-sectors of Indian hardware electronics industry. Each sub-sector comprises 13 sample firms for two time periods.The primary objective is to determine the relative contribution of TP and TEC to TFP Growth (TFPG) and to establish the influence of firm specific operational management decision variables on these two components. The study finds that both the sub-sectors have strived and achieved steady TP but not TEC in the period of economic liberalisation to cope with the intensifying competition. The management decisions with respect to asset and profit utilization, vertical integration, among others, improved TP and TE in the sub-sectors. However, R&D investments and technology imports proved costly for TFP indicating inadequate efforts and/or poor resource utilisation by the management. Management was found to be complacent in terms of improving or developing their own technology as indicated by their higher dependence on import of raw materials and no influence of R&D on TP.