Carbon sequestration versus bioenergy: A case study from South India exploring the relative land-use efficiency of two options for climate change mitigation

This case study has been carried out as a comparison between two different land-use strategies for climate change mitigation, with possible application within the Clean Development Mechanisms. The benefits of afforestation for carbon sequestration versus for bioenergy production are compared in the context of development planning to meet increasing domestic and agricultural demand for electricity in Hosahalli village, Karnataka, India. One option is to increase the local biomass based electricity generation, requiring an increased biomass plantation area. This option is compared with fossil based electricity generation where the area is instead used for producing wood for non-energy purposes while also sequestering carbon in the soil and standing biomass. The different options have been assessed using the PRO-COMAP model. The ranking of the different options varies depending on the system boundaries and time period. Results indicate that, in the short term (30 years) perspective, the mitigation potential of the long rotation plantation is largest, followed by the short rotation plantation delivering wood for energy. The bioenergy option is however preferred if a long-term view is taken. Short rotation forests delivering wood for short-lived non-energy products have the smallest mitigation potential, unless a large share of the wood products are used for energy purposes (replacing fossil fuels) after having served their initial purpose. If managed in a sustainable manner all of these strategies can contribute to the improvement of the social and environmental situation of the local community. (C) 2009 Elsevier Ltd. All rights reserved.

Studies on design, fabrication and reliability assessment of embedded passives on a high-density interconnect (HDI) organic substrate using a sequential build-up process

One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization.This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO3) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm(2). Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (similar to 0.015 at 1 GHz) and proposed low-loss BCB dielectric (similar to 0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo -mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations.Also, a prototype working product with the board level design including features of embedded resistors and capacitors are underway. Preliminary results of these are presented.

Area Optimized H.264 Intra Prediction Architecture for 1080p HD Resolution

High performance video standards use prediction techniques to achieve high picture quality at low bit rates. The type of prediction decides the bit rates and the image quality. Intra Prediction achieves high video quality with significant reduction in bit rate. This paper present an area optimized architecture for Intra prediction, for H.264 decoding at HDTV resolution with a target of achieving 60 fps. The architecture was validated on Virtex-5 FPGA based platform. The architecture achieves a frame rate of 64 fps. The architecture is based on multi-level memory hierarchy to reduce latency and ensure optimum resources utilization. It removes redundancy by reusing same functional blocks across different modes. The proposed architecture uses only 13% of the total LUTs available on the Xilinx FPGA XC5VLX50T.

Excision of uracil from the ends of double stranded DNA by uracil DNA glycosylase and its use in high efficiency cloning of PCR products

We show that uracil DNA glycosylase from E. coli excises uracil residues from the ends of double stranded oligos. This information has allowed us to develop an efficient method of cloning PCR amplified DNA. In this report, we describe use of this method in cloning of E. coli genes for lysyl- and methionyl-tRNA synthetases. Efficiency of cloning by this method was found to be the same as that of subcloning of DNA restriction fragments from one vector to the other vector. Possibilities of using other DNA glycosylases for such applications are discussed.

Fabrication and evaluation of 450 F electrochemical redox supercapacitors using inexpensive and high-performance, polyaniline coated, stainless-steel electrodes

Redox supercapacitors using polyaniline (PANI) coated. stainless-steel (SS) electrodes have been assembled and characterized. PANI has been deposited on SS substrate by a potentiodynamic method from an acidic electrolyte which contains aniline monomer. By employing stacks of electrodes, each with a geometrical area of 24 cm(2), in acidic perchlorate electrolyte, a capacitance value of about 450 F has been obtained over a long cycle-life. Characterization studies have been carried out by galvanostatic charge-discharge cycling of the capacitors singly, as well as in series and parallel configurations. Various electrical parameters have been evaluated. Use of the capacitors in parallel with a battery for pulse-power loads. and also working of a toy fan connected to the charged capacitors have been demonstrated. A specific capacitance value of about 1300 F g(-1) of PANI has been obtained at a discharge power of about 0.5 kW kg(-1). This value is several times higher than those reported in the literature for PANI and is, perhaps, the highest value known for a capacitor material. The inexpensive SS substrate and the high-capacitance PANI are favorable factors for commercial exploitation. (C) 2002 Elsevier Science B.V. All rights reserved.

Influence of land use changes in river basins on diversity and distribution of amphibians

Land-use changes influence local biodiversity directly, and also cumulatively, contribute to regional and global changes in natural systems and quality of life. Consequent to these, direct impacts on the natural resources that support the health and integrity of living beings are evident in recent times. The Western Ghats being one of the global biodiversity hotspots, is reeling under a tremendous pressure from human induced changes in terms of developmental projects like hydel or thermal power plants, big dams, mining activities, unplanned agricultural practices,monoculture plantations, illegal timber logging, etc. This has led to the once contiguous forest habitats to be fragmented in patches, which in turn has led to the shrinkage of original habitat for the wildlife, change in the hydrological regime of the catchment, decreased inflow in streams,human-animal conflicts, etc. Under such circumstances, a proper management practice is called for requiring suitable biological indicators to show the impact of these changes, set priority regions and in developing models for conservation planning. Amphibians are regarded as one of the best biological indicators due to their sensitivity to even the slightest changes in the environment and hence they could be used as surrogates in conservation and management practices. They are the predominating vertebrates with a high degree of endemism (78%) in Western Ghats. The present study is an attempt to bring in the impacts of various land-uses on anuran distribution in three river basins. Sampling was carried out for amphibians during all seasons of 2003-2006 in basins of Sharavathi, Aghanashini and Bedthi. There are as many as 46 species in the region, one of which is new to science and nearly 59% of them are endemic to the Western Ghats. They belong to nine families, Dicroglossidae being represented by 14 species,followed by Rhacophoridae (9 species) and Ranidae (5 species). Species richness is high in Sharavathi river basin, with 36 species, followed by Bedthi 33 and Aghanashini 27. The impact of land-use changes, was investigated in the upper catchment of Sharavathi river basin. Species diversity indices, relative abundance values, percentage endemics gave clear indication of differences in each sub-catchment. Karl Pearson’s correlation coefficient (r) was calculated between species richness, endemics, environmental descriptors, land-use classes and fragmentation metrics. Principal component analysis was performed to depict the influence of these variables. Results show that sub-catchments with lesser percentage of forest, low canopy cover, higher amount of agricultural area, low rainfall have low species richness, less endemic species and abundant non-endemic species, whereas endemism, species richness and abundance of endemic species are more in the sub-catchments with high tree density, endemic trees, canopy cover, rainfall and lower amount of agriculture fields. This analysis aided in prioritising regions in the Sharavathi river basin for further conservation measures.

INTACTE: An Interconnect Area, Delay, and Energy Estimation Tool for Microarchitectural Explorations

Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters. Hence these models are hard to use directly to make high level microarchitectural trade-offs in the initial exploration phase of a design. In this paper, we propose INTACTE, a tool that can be used by architects toget reasonably accurate interconnect area, delay, and power estimates based on a few architecture level parameters for the interconnect such as length, width (in number of bits), frequency, and latency for a specified technology and voltage. The tool uses well known models of interconnect delay and energy taking into account the wire pitch, repeater size, and spacing for a range of voltages and technologies.It then solves an optimization problem of finding the lowest energy interconnect design in terms of the low level circuit parameters, which meets the architectural constraintsgiven as inputs. In addition, the tool also provides the area, energy, and delay for a range of supply voltages and degrees of pipelining, which can be used for micro-architectural exploration of a chip. The delay and energy models used by the tool have been validated against low level circuit simulations. We discuss several potential applications of the tool and present an example of optimizing interconnect design in the context of clustered VLIW architectures. Copyright 2007 ACM.

Biofuel production and implications for land use, food production and environment in India

There is a large interest in biofuels in India as a substitute to petroleum-based fuels, with a purpose of enhancing energy security and promoting rural development. India has announced an ambitious target of substituting 20% of fossil fuel consumption by biodiesel and bioethanol by 2017. India has announced a national biofuel policy and launched a large program to promote biofuel production, particularly on wastelands: its implications need to be studied intensively considering the fact that India is a large developing country with high population density and large rural population depending upon land for their livelihood. Another factor is that Indian economy is experiencing high growth rate, which may lead to enhanced demand for food, livestock products, timber, paper, etc., with implications for land use. Studies have shown that area under agriculture and forest has nearly stabilized over the past 2-3 decades. This paper presents an assessment of the implications of projected large-scale biofuel production on land available for food production, water, biodiversity, rural development and GHG emissions. The assessment will be largely focused on first generation biofuel crops, since the Indian program is currently dominated by these crops. Technological and policy options required for promoting sustainable biofuel production will be discussed. (C) 2010 Elsevier Ltd. All rights reserved.

High Throughput, Low Latency, Memory Optimized 64K Point FFT Architecture using Novel Radix-4 Butterfly Unit

In this paper we propose a fully parallel 64K point radix-4(4) FFT processor. The radix-4(4) parallel unrolled architecture uses a novel radix-4 butterfly unit which takes all four inputs in parallel and can selectively produce one out of the four outputs. The radix-4(4) block can take all 256 inputs in parallel and can use the select control signals to generate one out of the 256 outputs. The resultant 64K point FFT processor shows significant reduction in intermediate memory but with increased hardware complexity. Compared to the state-of-art implementation 5], our architecture shows reduced latency with comparable throughput and area. The 64K point FFT architecture was synthesized using a 130nm CMOS technology which resulted in a throughput of 1.4 GSPS and latency of 47.7 mu s with a maximum clock frequency of 350MHz. When compared to 5], the latency is reduced by 303 mu s with 50.8% reduction in area.