Operand Isolation Circuits with Reduced Overhead for Low Power Data-Path Design

Dynamic power dissipation due to redundant switching is an important metric in data-path design. This paper focuses on the use of ingenious operand isolation circuits for low power design. Operand isolation attempts to reduce switching by clamping or latching the output of a first level of combinational circuit. This paper presents a novel method using power supply switching wherein both PMOS and NMOS stacks of a circuit are connected to the same power supply. Thus, the output gets clamped or latched to the power supply value with minimal leakage. The proposed circuits make use of only two transistors to clamp the entire Multiple Input Multiple Output (MIMO) block. Also, the latch-based designs have higher drive strength in comparison to the existing methods. Simulation results have shown considerable area reduction in comparison to the existing techniques without increasing timing overhead.

Active Power Decoupling with Reduced Converter Stress for Single-Phase Power Conversion and Interfacing

Single-phase DC/AC power electronic converters suffer from pulsating power at double the line frequency. The commonest practice to handle the issue is to provide a huge electrolytic capacitor for smoothening out the ripple. But, the electrolytic capacitors having short end of lifetimes limit the overall lifetime of the converter. Another way of handling the ripple power is by active power decoupling (APD) using the storage devices and a set of semiconductor switches. Here, a novel topology has been proposed implementing APD. The topology claims the benefit of 1) reduced stress on converter switches 2) using smaller capacitance value thus alleviating use of electrolytic capacitor in turn improving the lifetime of the converter. The circuit consists of a third leg, a storage capacitor and a storage inductor. The analysis and the simulation results are shown to prove the effectiveness of the topology.

Flexible implementation of power system corrective topology control

This paper proposes a novel decision making framework for optimal transmission switching satisfying the AC feasibility, stability and circuit breaker (CB) reliability requirements needed for practical implementation. The proposed framework can be employed as a corrective tool in day to day operation planning scenarios in response to potential contingencies. The switching options are determined using an efficient heuristic algorithm based on DC optimal power flow, and are presented in a multi-branch tree structure. Then, the AC feasibility and stability checks are conducted and the CB condition monitoring data are employed to perform a CB reliability and line availability assessment. Ultimately, the operator will be offered multiple AC feasible and stable switching options with associated benefits. The operator can use this information, other operating conditions not explicitly considered in the optimization, and his/her own experience to implement the best and most reliable switching action(s). The effectiveness of the proposed approach is validated on the IEEE-118 bus test system. (C) 2015 Elsevier B.V. All rights reserved.

Active Power Decoupling with Reduced Converter Stress for Single-Phase Power Conversion and Interfacing

Single-phase DC/AC power electronic converters suffer from pulsating power at double the line frequency. The commonest practice to handle the issue is to provide a huge electrolytic capacitor for smoothening out the ripple. But, the electrolytic capacitors having short end of lifetimes limit the overall lifetime of the converter. Another way of handling the ripple power is by active power decoupling (APD) using the storage devices and a set of semiconductor switches. Here, a novel topology has been proposed implementing APD. The topology claims the benefit of 1) reduced stress on converter switches 2) using smaller capacitance value thus alleviating use of electrolytic capacitor in turn improving the lifetime of the converter. The circuit consists of a third leg, a storage capacitor and a storage inductor. The analysis and the simulation results are shown to prove the effectiveness of the topology.

Alternate Proof for Steady-State Equivalent Circuit of a Doubly Fed Induction Machine

This letter presents an alternate proof for the steady-state equivalent circuit of a doubly fed induction machine operating at supersynchronous speeds. The spatial orientation of rotating magnetic fields is used to validate the conjugation of rotor side quantities arising in supersynchronous mode. The equivalent circuit is further validated using dynamic simulations of a stand-alone machine.

Vortex dynamics at rf frequencies in Bi2Sr2CaCu2O8 single crystals

We have studied the low magnetic field high temperature region of the H-T phase diagram of Bi2Sr2CaCu2O8 single crystals using the technique of non-resonant rf response at a frequency of 20 MHz. With H(rf)parallel to a, H parallel to c, the isothermal magnetic field scans below T-c show that the frequency f(H) of the tank circuit decreases continuously with increase in H before saturating at H similar to H-D(T). Such a decrease in f(H) reflects increasing rf penetration into the weakly screened region between CuO bilayers. The saturation of f(H) at its lowest value for H similar to H-D(T) indicates complete rf penetration land hence the disappearance of field dependence) due to the vanishing of the screening rf currents I-rf(c) in those regions or equivalently when the phase coherence between adjacent superconducting layers vanishes. Therefore H,(T) represents the decoupling of the adjacent superconducting bilayers, and hence also a 3D to 2D decoupling transition of the vortex structure. Simultaneous monitoring of the field dependent rf power dissipation P(H) shows a maximum in dP/dH at H-D(T). The observed H-D(T) line in many crystals is in excellent agreement with the (l/t-1) behavior proposed for decoupling.

Equivalent Circuit Analysis of Serpentine Folded-waveguide Slow-wave Structures for Millimeter-wave Traveling-wave Tubes

A simple equivalent circuit model for the analysis of dispersion and interaction impedance characteristics of serpentine folded-waveguide slow-wave structure was developed by considering the straight and curved portions of structure supporting the dominant TE10-mode of the rectangular waveguide. Expressions for the lumped capacitance and inductance per period of the slow-wave structure were derived in terms of the physical dimensions of the structure, incorporating the effects of the beam-hole in the lumped parameters. The lumped parameters were subsequently interpreted for obtaining the dispersion and interaction impedance characteristics of the structure. The analysis was simple yet accurate in predicting the dispersion and interaction impedance behaviour at millimeter-wave frequencies. The analysis was benchmarked against measurement as well as with 3D electromagnetic modeling using MAFIA for two typical slow-wave structures (one at the Ka-band and the other at the W-band) and close agreement observed.

State of Charge of Lead Acid Battery

Lead acid batteries are used in hybrid vehicles and telecommunications power supply. For reliable operation of these systems, an indication of state of charge of battery is essential. To determine the state of charge of battery, current integration method combined with open circuit voltage, is being implemented. To reduce the error in the current integration method the dependence of available capacity as a function of discharge current is determined. The current integration method is modified to incorporate this factor. The experimental setup built to obtain the discharge characterstics of the battery is presented.

A Proposal for Concurrent Estimation of Static and Dynamic Nonlinearity of ADC

Despite great advances in very large scale integrated-circuit design and manufacturing, performance of even the best available high-speed, high-resolution analog-to-digital converter (ADC) is known to deteriorate while acquiring fast-rising, high-frequency, and nonrepetitive waveforms. Waveform digitizers (ADCs) used in high-voltage impulse recordings and measurements are invariably subjected to such waveforms. Errors resulting from a lowered ADC performance can be unacceptably high, especially when higher accuracies have to be achieved (e.g., when part of a reference measuring system). Static and dynamic nonlinearities (estimated independently) are vital indices for evaluating performance and suitability of ADCs to be used in such environments. Typically, the estimation of static nonlinearity involves 10-12 h of time or more (for a 12-b ADC) and the acquisition of millions of samples at high input frequencies for dynamic characterization. ADCs with even higher resolution and faster sampling speeds will soon become available. So, there is a need to reduce testing time for evaluating these parameters. This paper proposes a novel and time-efficient method for the simultaneous estimation of static and dynamic nonlinearity from a single test. This is achieved by conceiving a test signal, comprised of a high-frequency sinusoid (which addresses dynamic assessment) modulated by a low-frequency ramp (relevant to the static part). Details of implementation and results on two digitizers are presented and compared with nonlinearities determined by the existing standardized approaches. Good agreement in results and time savings achievable indicates its suitability.

Load-Commutated SCR Current-Source-Inverter-Fed Induction Motor Drive With Sinusoidal Motor Voltage and Current

Current source inverter (CSI) is an attractive solution in high-power drives. The conventional gate turn-off thyristor (GTO) based CSI-fed induction motor drives suffer from drawbacks such as low-frequency torque pulsation, harmonic heating, and unstable operation at low-speed ranges. These drawbacks can be overcome by connecting a current-controlled voltage source inverter (VSI) across the motor terminal replacing the bulky ac capacitors. The VSI provides the harmonic currents, which results in sinusoidal motor voltage and current even with the CSI switching at fundamental frequency. This paper proposes a CSI-fed induction motor drive scheme where GTOs are replaced by thyristors in the CSI without any external circuit to assist the turning off of the thyristors. Here, the current-controlled VSI, connected in shunt, is designed to supply the volt ampere reactive requirement of the induction motor, and the CSI is made to operate in leading power factor mode such that the thyristors in the CSI are autosequentially turned off. The resulting drive will be able to feed medium-voltage, high-power induction motors directly. A sensorless vector-controlled CSI drive based on the proposed configuration is developed. The experimental results from a 5 hp prototype are presented. Experimental results show that the proposed drive has stable operation throughout the operating range of speeds.

Fast Multiple Access Selection through variable power transmissions

Many wireless applications demand a fast mechanism to detect the packet from a node with the highest priority ("best node") only, while packets from nodes with lower priority are irrelevant. In this paper, we introduce an extremely fast contention-based multiple access algorithm that selects the best node and requires only local information of the priorities of the nodes. The algorithm, which we call Variable Power Multiple Access Selection (VP-MAS), uses the local channel state information from the accessing nodes to the receiver, and maps the priorities onto the receive power. It is based on a key result that shows that mapping onto a set of discrete receive power levels is optimal, when the power levels are chosen to exploit packet capture that inherently occurs in a wireless physical layer. The VP-MAS algorithm adjusts the expected number of users that contend in each step and their respective transmission powers, depending on whether previous transmission attempts resulted in capture, idle channel, or collision. We also show how reliable information regarding the total received power at the receiver can be used to improve the algorithm by enhancing the feedback mechanism. The algorithm detects the packet from the best node in 1.5 to 2.1 slots, which is considerably lower than the 2.43 slot average achieved by the best algorithm known to date.

On the nature of power flow equations in security analysis

The power system network is assumed to be in steady-state even during low frequency transients. However, depending on generator dynamics, and toad and control characteristics, the system model and the nature of power flow equations can vary The nature of power flow equations describing the system during a contingency is investigated in detail. It is shown that under some mild assumptions on load-voltage characteristics, the power flow equations can be decoupled in an exact manner. When the generator dynamics are considered, the solutions for the load voltages are exact if load nodes are not directly connected to each other

Some aspects of multilevel load-frequency control of a power system

The application of multilevel control strategies for load-frequency control of interconnected power systems is assuming importance. A large multiarea power system may be viewed as an interconnection of several lower-order subsystems, with possible change of interconnection pattern during operation. The solution of the control problem involves the design of a set of local optimal controllers for the individual areas, in a completely decentralised environment, plus a global controller to provide the corrective signal to account for interconnection effects. A global controller, based on the least-square-error principle suggested by Siljak and Sundareshan, has been applied for the LFC problem. A more recent work utilises certain possible beneficial aspects of interconnection to permit more desirable system performances. The paper reports the application of the latter strategy to LFC of a two-area power system. The power-system model studied includes the effects of excitation system and governor controls. A comparison of the two strategies is also made.

Optimum Evaluation of Reactive Power Requirements in Power Distribution-Systems

This paper presents three methodologies for determining optimum locations and magnitudes of reactive power compensation in power distribution systems. Method I and Method II are suitable for complex distribution systems with a combination of both radial and ring-main feeders and having different voltage levels. Method III is suitable for low-tension single voltage level radial feeders. Method I is based on an iterative scheme with successive powerflow analyses, with formulation and solution of the optimization problem using linear programming. Method II and Method III are essentially based on the steady state performance of distribution systems. These methods are simple to implement and yield satisfactory results comparable with the results of Method I. The proposed methods have been applied to a few distribution systems, and results obtained for two typical systems are presented for illustration purposes.

State of Charge of Lead Acid Battery

Lead acid batteries are used in hybrid vehicles and telecommunications power supply. For reliable operation of these systems, an indication of state of charge of battery is essential. To determine the state of charge of battery, current integration method combined with open circuit voltage, is being implemented. To reduce the error in the current integration method the dependence of available capacity as a function of discharge current is determined. The current integration method is modified to incorporate this factor. The experimental setup built to obtain the discharge characterstics of the battery is presented