Editorial optical computing circuits, devices and systems

Information forms the basis of modern technology. To meet the ever-increasing demand for information, means have to be devised for a more efficient and better-equipped technology to intelligibly process data. Advances in photonics have made their impact on each of the four key applications in information processing, i.e., acquisition, transmission, storage and processing of information. The inherent advantages of ultrahigh bandwidth, high speed and low-loss transmission has already established fiber-optics as the backbone of communication technology. However, the optics to electronics inter-conversion at the transmitter and receiver ends severely limits both the speed and bit rate of lightwave communication systems. As the trend towards still faster and higher capacity systems continues, it has become increasingly necessary to perform more and more signal-processing operations in the optical domain itself, i.e., with all-optical components and devices that possess a high bandwidth and can perform parallel processing functions to eliminate the electronic bottleneck.

Modified McMurray Inverter with Pulse Forming Network Commutation Circuits

The modified McMurray Inverter with Pulse Forming Network (PFN) has been explained. The current and voltage waveshapes of the PFN commutation ci rcuit have been compared with conventional L-commutation circuit. The design method of PFN has been explained. Advantages of this type of commutation have been discussed. Experimental results are given.

A Five-Level Inverter Topology with Single-DC Supply by Cascading a Flying Capacitor Inverter and an H-Bridge

In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topology is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamental) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This feature improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor.

Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor

A generalized power tracking algorithm that minimizes power consumption of digital circuits by dynamic control of supply voltage and the body bias is proposed. A direct power monitoring scheme is proposed that does not need any replica and hence can sense total power consumed by load circuit across process, voltage, and temperature corners. Design details and performance of power monitor and tracking algorithm are examined by a simulation framework developed using UMC 90-nm CMOS triple well process. The proposed algorithm with direct power monitor achieves a power savings of 42.2% for activity of 0.02 and 22.4% for activity of 0.04. Experimental results from test chip fabricated in AMS 350 nm process shows power savings of 46.3% and 65% for load circuit operating in super threshold and near sub-threshold region, respectively. Measured resolution of power monitor is around 0.25 mV and it has a power overhead of 2.2% of die power. Issues with loop convergence and design tradeoff for power monitor are also discussed in this paper.

Self Repair in Circuits-Automating Open Fault Repair in Integrated Circuits Using Field-Induced Aggregation of Carbon Nanotubes

This paper presents studies on the use of carbon nanotubes dispersed in an insulating fluid to serve as an automaton for healing open-circuit interconnect faults in integrated circuits. The physics behind the repair mechanism is the electric-field-induced diffusion limited aggregation. On the occurrence of an open fault, the repair is automatically triggered due to the presence of an electric field across the gap. We perform studies on the repair time as a function of the electric field and dispersion concentrations with the above application in mind.

Evaluation of damage in reinforced concrete bridge beams using acoustic emission technique

Acoustic emission (AE) testing is a well-known method for damage identification of various concrete structures including bridges. This article presents a method to assess damage in reinforced concrete (RC) bridge beams subjected to incremental cyclic loading. The specifications in the standard NDIS-2421 were used to classify the damage in RC bridge beams. Earlier researchers classified the damage occurring in bridge beams by using crack mouth opening displacement (CMOD) and AE released and proposed a standard (NDIS-2421: the Japanese Society for NonDestructive Inspection). In general, multiple cracks take place in RC beams under bending; therefore, utilisation of CMOD for crack detection may not be appropriate. In the present study, the damage in RC beams is classified by using the AE released, deflection, strains in steel and concrete, because the measurement of the strains in steel and concrete is easy and the codes of practice are specified for different limit states (IS-456:2000). The observations made in the present experimental study have some important practical applications in assessing the state of damage of concrete structural members.

Signal-Powered Low-Drop-Diode Equivalent Circuit for Full-Wave Bridge Rectifier

Piezoelectric-device-based vibration energy harvesting requires a rectifier for conversion of input ac to usable dc form. Power loss due to diode drop in rectifier is a significant fraction of the already low levels of harvested power. The proposed circuit is a low-drop-diode equivalent, which mimics a diode using linear region-operated MOSFET. The proposed diode equivalent is powered directly from input signal and requires no additional power supply for its control. Power used by the control circuit is kept at a bare minimum to have an overall output power improvement. Diode equivalent was used to replace the four diodes in a full-wave bridge rectifier, which is the basic full- wave rectifier and is a part of the more advanced rectifiers like switch-only and bias-flip rectifiers. Simulation in 130-nm technology and experiment with discrete components show that a bridge rectifier with the proposed diode provides a 30-169% increase in output power extracted from piezoelectric device, as compared to a bridge rectifier with diode-connected MOSFETs. The bridge rectifier with the proposed diode can extract 90% of the maximum available power from an ideal piezoelectric device-bridge rectifier circuit. Setting aside the constraint of power loss, simulations indicate that diode drop as low as 10 mV at 38 mu A can be achieved.

Strain localization effect on system reliability based design of bridge abutments under earthquake loading

The component and system reliability based design of bridge abutments under earthquake loading is presented in the paper. Planar failure surface has been used in conjunction with pseudo-dynamic approach to compute seismic active earth pressures on an abutment. The pseudo-dynamic method, considers the effect of phase difference in shear waves, soil amplification along with the horizontal seismic accelerations, strain localization in backfill soil and associated post-peak reduction in the shear resistance from peak to residual values along a previously formed failure plane. Four modes of stability viz. sliding, overturning, eccentricity and bearing capacity of the foundation soil are considered in the analysis. The series system reliability is computed with an assumption of independent failure modes. The lower and upper bounds of system reliability are also computed by taking into account the correlations between four failure modes, which is evaluated using the direction cosines of the tangent planes at the most probable points of failure.

Influence of strain localization on reliability based design of bridge abutments using pseudo-dynamic method

The paper focuses on reliability based design of bridge abutments when subjected to earthquake loading. Planar failure surface has been used in conjunction with pseudo-dynamic approach to compute the seismic active earth pressures on the bridge abutment. The proposed pseudo dynamic method, considers the effects of strain localization in the backfill soil and associated post-peak reduction in the shear resistance from peak to residual values along a previously formed failure plane, phase difference in shear waves and soil amplification along with the horizontal seismic accelerations. Four modes of stability viz. sliding, overturning, eccentricity and bearing capacity of the foundation soil are considered for the reliability analysis. The influence of various design parameters on the seismic reliability indices against four modes of failure is presented, following the suggestions of Japan Road Association, Caltrans Bridge Design Specifications and U.S Department of the Army.

Comparison of 3-phase, 3-level UPF rectifier circuits for high power applications

This paper presents an analysis and comparison between two circuit topologies of the 3-phase, 3-level unity power factor (Vienna) rectifier on the basis of packaging issues and semiconductor power losses. The analysis indicates the suitability of one particular circuit variant due to restrictions on switching frequency at higher power levels. A comparison is also done between hysteresis and carrier based PWM strategies for current control of the rectifier, along with experimental evaluation of the control strategies on a hardware prototype of the rectifier. The comparison indicates that the carrier based modulation strategy is better suited for use with higher order filters that are utilized in high power applications.

Safety Assessment of a Masonry Arch Bridge: Field Testing and Simulations

The safety of an in-service brick arch railway bridge is assessed through field testing and finite-element analysis. Different loading test train configurations have been used in the field testing. The response of the bridge in terms of displacements, strains, and accelerations is measured under the ambient and design train traffic loading conditions. Nonlinear fracture mechanics-based finite-element analyses are performed to assess the margin of safety. A parametric study is done to study the effects of tensile strength on the progress of cracking in the arch. Furthermore, a stability analysis to assess collapse of the arch caused by lateral movement at the springing of one of the abutments that is elastically supported is carried out. The margin of safety with respect to cracking and stability failure is computed. Conclusions are drawn with some remarks on the state of the bridge within the framework of the information available and inferred information. DOI: 10.1061/(ASCE)BE.1943-5592.0000338. (C) 2013 American Society of Civil Engineers.

Common-mode voltage eliminated three-level inverter using a three-level flying-capacitor inverter and cascaded H-bridge

This paper proposes a new 3 level common mode voltage eliminated inverter using an inverter structure formed by cascading a H-Bridge with a three-level flying capacitor inverter. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-Bridge fails, the system can still be operated as a normal 3 level inverter mode at full power. This inverter has many advantages like use of single DC-supply, making it possible for a back to back grid-tied converter application, improved reliability etc.

A Three-Level Common-Mode Voltage Eliminated Inverter With Single DC Supply Using Flying Capacitor Inverter and Cascaded H-Bridge

A three-level common-mode voltage eliminated inverter with single dc supply using flying capacitor inverter and cascaded H-bridge has been proposed in this paper. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-bridge fails, the system can still be operated as a normal three-level inverter at full power. This inverter has many other advantages like use of single dc supply, making it possible for a back-to-back grid-tied converter application, improved reliability, etc.