Combinatorial logic synthesis using technology directed decomposition

The aim of logic synthesis is to produce circuits which satisfy the given boolean function while meeting timing constraints and requiring the minimum silicon area. Logic synthesis involves two steps namely logic decomposition and technology mapping. Existing methods treat the two as separate operation. The traditional approach is to minimize the number of literals without considering the target technology during the decomposition phase. The decomposed expressions are then mapped on to the target technology to optimize the area, Timing optimization is carried out subsequently, A new approach which treats logic decomposition and technology maping as a single operation is presented. The logic decomposition is based on the parameters of the target technology. The area and timing optimization is carried out during logic decomposition phase itself. Results using MCNC circuits are presented to show that this method produces circuits which are 38% faster while requiring 14% increase in area.

Training Young Minds for Nanoscience and Technology: Issues and Challenges

This article explores issues and challenges in the field of education in nanoscience and technology with special emphasis with respect to India, where an expanding programme of research in nano science and technology is in place. The article does not concentrate on actual curricula that are needed in nano science and technology education course. Rather it focuses on the desirability of nanoscience and technology education at different levels of education and future prospect of students venturing into this within the economic and cultural milieu of India. We argue that care is needed in developing the education programme in India. However, the risk is worth taking as the education on nanoscience and technology can bridge the man power gap not only in this area of technology but also related technologies of hardware and micro electronics for which the country is a promising destination at global level. This will also unlock the demographical advantage that India will enjoy in the next five decades.

Role of Management Decision Variables in Determining Technology Progress and Technical Efficiency in Indian Electronic Industry

This paper analyses the influence of management on Technical Efficiency Change (TEC) and Technological Progress (TP) in the communication equipment and consumer electronics sub-sectors of Indian hardware electronics industry. Each sub-sector comprises 13 sample firms for two time periods.The primary objective is to determine the relative contribution of TP and TEC to TFP Growth (TFPG) and to establish the influence of firm specific operational management decision variables on these two components. The study finds that both the sub-sectors have strived and achieved steady TP but not TEC in the period of economic liberalisation to cope with the intensifying competition. The management decisions with respect to asset and profit utilization, vertical integration, among others, improved TP and TE in the sub-sectors. However, R&D investments and technology imports proved costly for TFP indicating inadequate efforts and/or poor resource utilisation by the management. Management was found to be complacent in terms of improving or developing their own technology as indicated by their higher dependence on import of raw materials and no influence of R&D on TP.

Necessity for quatum simulation for future technology nodes

In this paper we present and compare the results obtained from semi-classical and quantum mechanical simulation for a double gate MOSFET structure to analyze the electrostatics and carrier dynamics of this device. The geometries like gate length, body thickness of this device have been chosen according to the ITRS specification for the different technology nodes. We have shown the extent of deviation between the semi- classical and quantum mechanical results and hence the need of quantum simulations for the promising nanoscale devices in the future technology nodes predicted in ITRS.

Correlations between structure and thermodynamic properties of spinels and their applications in technology

Measurements a/the Gibbs' energy enthalpy and entrupy vffarmation oj chromites, vanadites and alumlnat.:s 0/ F", Ni. Co'. Mn, Zn Mg and Cd, using solid oxide galvanic cells over a ternperature range extending approximately lOOO°C, have shown that the '~'Ilir"!,,, J'JrIl/iJ~ tion 0/ cubic 2-3 oxide spinel phases (MX!O,), from component oxide (MO) with rock-salt and X.Os whir c(1f'l/!ldwn st!'llt'lw,·. call b,' represented by a semi-empirical correlalion, ~S~ = --LiS + L'i,SM +~S~:"d(±O.3) cal.deg-1 mol-1 where /',.SM Is the entropy 0/calian mixing oillhe tetrahedral alld octahedral sites o/the spinel and Sr:~ is tlie enfropy associaf,'d Wifh Ih,' randomization a/the lahn-Telier distortions. A review a/the methods/or evaluating the cation distriblltion lfl spille!s suggeJ{j' l/r,l! Ihe most promising scheme is based Oil octahedral site preference energies from the crystal field theory for the Iral1silioll IIIl'f"! IlIIL';. For I/""-Irallsifioll melal cal ions site preference energies are derived relative /0 thol'lt fLI, [ransilion metal ions from measured high tClllP('ftJi ure Cal iUlI disll iiJuriol1 in spine! phases thar contail! one IransilioJl metal and another non-transition metal carion. For 2-3 srinds compulatiorrs b,IS"J Oil i.!c[J;' Temkin mixing on each catioll subialtice predici JistributionJ that are In fair agreement with X-ray and 1I1'IIIrOll ditTraction, /IIdg""!ic dll.! electrical propcrries, and spectroscopic measurements. In 2-4 spineis mixing vI ions do not foliow strictly ideal slllIistli:al Jaws, Th,' OIl/up) associated with the randomizalion 0/the Jllhn-Teller dislOriioll" appear to be significant, only ill spinels witll 3d'. 3d', 3d' (ifld~UI' iOtls in tetrahedral and 3d' and 3d9 ions in octahedral positions. Application 0/this structural model for predicting the thermodynamic proputies ofspinel solid .,olutiofl5 or,' illustrated. F,lr complex systems additional contributions arising from strain fields, redox equilibria and off-center ions have to be qllalllififti. The entropy correlation for spinels provides a method for evaluating structure tran:.jormafiofl entropies in silllple o.\id.-s, ["founlllion on the relative stabilities ofoxides in different crystallCtructures is USe/III for computer ea/culaliof! a/phase dfugrullls ofIlIrer,',,1 III (N.lll1ie5 by method, similar to thost: used by Kaufman and Bernstein for refractory alloy systems. Examples oftechnoiogical appliCation tnclude the predictioll ofdeoxidation equilibria in Fe-Mn-AI-O s),slelll at 1600°C duj ,'Ulllpltfalion 0/phase relutions in Fe-Ni-Cr-S system,

An Area-Efficient Noise-Adaptive Neural Amplifier in 130 nm CMOS Technology

Chronic recording of neural signals is indispensable in designing efficient brain–machine interfaces and to elucidate human neurophysiology. The advent of multichannel micro-electrode arrays has driven the need for electronics to record neural signals from many neurons. The dynamic range of the system can vary over time due to change in electrode–neuron distance and background noise. We propose a neural amplifier in UMC 130 nm, 1P8M complementary metal–oxide–semiconductor (CMOS) technology. It can be biased adaptively from 200 nA to 2 $mu{rm A}$, modulating input referred noise from 9.92 $mu{rm V}$ to 3.9 $mu{rm V}$. We also describe a low noise design technique which minimizes the noise contribution of the load circuitry. Optimum sizing of the input transistors minimizes the accentuation of the input referred noise of the amplifier and obviates the need of large input capacitance. The amplifier achieves a noise efficiency factor of 2.58. The amplifier can pass signal from 5 Hz to 7 kHz and the bandwidth of the amplifier can be tuned for rejecting low field potentials (LFP) and power line interference. The amplifier achieves a mid-band voltage gain of 37 dB. In vitro experiments are performed to validate the applicability of the neural low noise amplifier in neural recording systems.

Cd concentration sensor based on fiber grating technology

Fiber Bragg grating (FBG) and Long Period Grating (LPG) chemical sensors are one of the most exciting developments in the field of optical fiber sensors. In this paper we have proposed a simple and effective chemical sensor based on FBG and LPG techniques for detecting the traces of cadmium (Cd) in drinking water at ppm level. The sensitiveness of these two has been compared. Also, these results have been compared with the results obtained by sophisticated spectroscopic atomic absorption and emission spectrometer instruments. For proper designing of FBG to act as a concentration sensor, the cladding region of the grating has been etched using HF solution. We have characterized the FBG concentration sensor sensitivities for different solutions of Cd concentrations varying from 0.01 ppm to 0.04 ppm and observed reflected spectrum in FBG and transmitted spectrum in LPG using Optical Spectrum Analyzer. Proper reagents have been used in the solutions for detection of the Cd species. The overall shift in wavelength is 10 nm in case of LPG and the shift of Bragg wavelength is 0.07 nm in case of FBG for 0.01-0.04 ppm concentrations. (C) 2011 Elsevier B.V. All rights reserved.

Perspectives on Titanium Science and Technology

The basic framework and - conceptual understanding of the metallurgy of Ti alloys is strong and this has enabled the use of titanium and its alloys in safety-critical structures such as those in aircraft and aircraft engines. Nevertheless, a focus on cost-effectiveness and the compression of product development time by effectively integrating design with manufacturing in these applications, as well as those emerging in bioengineering, has driven research in recent decades towards a greater predictive capability through the use of computational materials engineering tools. Therefore this paper focuses on the complexity and variety of fundamental phenomena in this material system with a focus on phase transformations and mechanical behaviour in order to delineate the challenges that lie ahead in achieving these goals. (C) 2012 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.

Device oriented statistical modeling method for process variability in 45nm analog CMOS technology

With the rapid scaling down of the semiconductor process technology, the process variation aware circuit design has become essential today. Several statistical models have been proposed to deal with the process variation. We propose an accurate BSIM model for handling variability in 45nm CMOS technology. The MOSFET is designed to meet the specification of low standby power technology of International Technology Roadmap for Semiconductors (ITRS).The process parameters variation of annealing temperature, oxide thickness, halo dose and title angle of halo implant are considered for the model development. One parameter variation at a time is considered for developing the model. The model validation is done by performance matching with device simulation results and reported error is less than 10%.© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.