Electrical and Optical Properties of Diketopyrrolopyrrole-Based Copolymer Interfaces in Thin Film Devices

Two donor acceptor diketopyrrolopyrrole (DPP)-based copolymers (PDPP-BBT and TDPP-BBT) have been synthesized for their application in organic devices such as metal-insulator semiconductor (MIS) diodes and field-effect transistors (FETs). The semiconductor-dielectric interface was characterized by capacitance-voltage and conductance-voltage methods. These measurements yield an interface trap density of 4.2 x 10(12) eV(-1) cm(-2) in TDPP-BBT and 3.5 x 10(12) eV(-1) cm(-2) in PDPP-BBT at the flat-band voltage. The FETs based on these spincoated DPP copolymers display p-channel behavior with hole mobilities of the order 10(-3) cm(2)/(V s). Light scattering studies from PDPP-BBT FETs show almost no change in the Raman spectrum after the devices are allowed to operate at a gate voltage, indicating that the FETs suffer minimal damage due to the metal-polymer contact or the application of an electric field. As a comparison Raman intensity profile from the channel-Au contact layer in pentacene FETs are presented, which show a distinct change before and after biasing.

Electrical properties of ferroelectric YMnO3 films deposited on n-type Si(111) substrates

YMnO3 thin films were grown on an n-type Si substrate by nebulized spray pyrolysis in the metal-ferroelectric-semiconductor (MFS) configuration. The capacitance-voltage characteristics of the film in the MFS structure exhibit hysteretic behaviour consistent with the polarization charge switching direction, with the memory window decreasing with increase in temperature. The density of the interface states decreases with increasing annealing temperature. Mapping of the silicon energy band gap with the interface states has been carried out. The leakage current, measured in the accumulation region, is lower in well-crystallized thin films and obeys a space-charge limited conduction mechanism. The calculated activation energy from the dc leakage current characteristics of the Arrhenius plot reveals that the activation energy corresponds to oxygen vacancy motion.

Effect of annealing temperature on electrical and nano-structural properties of sol-gel derived ZnO thin films

Zinc oxide (ZnO) thin films have been prepared on silicon substrates by sol-gel spin coating technique with spinning speed of 3,000 rpm. The films were annealed at different temperatures from 200 to 500 A degrees C and found that ZnO films exhibit different nanostructures at different annealing temperatures. The X-ray diffraction (XRD) results showed that the ZnO films convert from amorphous to polycrystalline phase after annealing at 400 A degrees C. The metal oxide semiconductor (MOS) capacitors were fabricated using ZnO films deposited on pre-cleaned silicon (100) substrates and electrical properties such as current versus voltage (I-V) and capacitance versus voltage (C-V) characteristics were studied. The electrical resistivity decreased with increasing annealing temperature. The oxide capacitance was measured at different annealing temperatures and different signal frequencies. The dielectric constant and the loss factor (tan delta) were increased with increase of annealing temperature.

A Simulation Based Study and Analysis of Double Gate Tunnel FET Performance for Low Stand-By Power Applications

The conventional metal oxide semiconductor field effect transistor (MOSFET)may not be suitable for future low standby power (LSTP) applications due to its high off-state current as the sub-threshold swing is theoretically limited to 60mV/decade. Tunnel field effect transistor (TFET) based on gate controlled band to band tunneling has attracted attention for such applications due to its extremely small sub-threshold swing (much less than 60mV/decade). This paper takes a simulation approach to gain some insight into its electrostatics and the carrier transport mechanism. Using 2D device simulations, a thorough study and analysis of the electrical parameters of the planar double gate TFET is performed. Due to excellent sub-threshold characteristics and a reverse biased structure, it offers orders of magnitude less leakage current compared to the conventional MOSFET. In this work, it is shown that the device can be scaled down to channel lengths as small as 30 nm without affecting its performance. Also, it is observed that the bulk region of the device plays a major role in determining the sub-threshold characteristics of the device and considerable improvement in performance (in terms of ION/IOFF ratio) can be achieved if the thickness of the device is reduced. An ION/IOFF ratio of 2x1012 and a minimum point sub-threshold swing of 22mV/decade is obtained.

Electrical Switching and Other Properties of Chalcogenide Glasses

Abstract | Electrical switching which has applications in areas such as information storage, power control, etc is a scientifically interesting and technologically important phenomenon exhibited by glassy chalcogenide semiconductors. The phase change memories based on electrical switching appear to be the most promising next generation non-volatile memories, due to many attributes which include high endurance in write/read operations, shorter write/read time, high scalability, multi-bit capability, lower cost and a compatibility with complementary metal oxide semiconductor technology.Studies on the electrical switching behavior of chalcogenide glasses help us in identifying newer glasses which could be used for phase change memory applications. In particular, studies on the composition dependence of electrical switching parameters and investigations on the correlation between switching behavior with other material properties are necessary for the selection of proper compositions which make good memory materials.In this review, an attempt has been made to summarize the dependence of the electrical switching behavior of chalcogenide glasses with other material properties such as network topological effects, glass transition & crystallization temperature, activation energy for crystallization, thermal diffusivity, electrical resistivity and others.

A Simple Charge Model for Symmetric Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry

Surface-potential-based compact charge models for symmetric double-gate metal-oxide-semiconductor field-effect transistors (SDG-MOSFETs) are based on the fundamental assumption of having equal oxide thicknesses for both gates. However, for practical devices, there will always be some amount of asymmetry between the gate oxide thicknesses due to process variations and uncertainties, which can affect device performance significantly. In this paper, we propose a simple surface-potential-based charge model, which is applicable for tied double-gate MOSFETs having same gate work function but could have any difference in gate oxide thickness. The proposed model utilizes the unique so-far-unexplored quasi-linear relationship between the surface potentials along the channel. In this model, the terminal charges could be computed by basic arithmetic operations from the surface potentials and applied biases, and thus, it could be implemented in any circuit simulator very easily and extendable to short-channel devices. We also propose a simple physics-based perturbation technique by which the surface potentials of an asymmetric device could be obtained just by solving the input voltage equation of SDG devices for small asymmetry cases. The proposed model, which shows excellent agreement with numerical and TCAD simulations, is implemented in a professional circuit simulator through the Verilog-A interface and demonstrated for a 101-stage ring oscillator simulation. It is also shown that the proposed model preserves the source/drain symmetry, which is essential for RF circuit design.

Improvements in Efficiency of Surface Potential Computation for Independent DG MOSFET

A robust numerical solution of the input voltage equations (IVEs) for the independent-double-gate metal-oxide-semiconductor field-effect transistor requires root bracketing methods (RBMs) instead of the commonly used Newton-Raphson (NR) technique due to the presence of nonremovable discontinuity and singularity. In this brief, we do an exhaustive study of the different RBMs available in the literature and propose a single derivative-free RBM that could be applied to both trigonometric and hyperbolic IVEs and offers faster convergence than the earlier proposed hybrid NR-Ridders algorithm. We also propose some adjustments to the solution space for the trigonometric IVE that leads to a further reduction of the computation time. The improvement of computational efficiency is demonstrated to be about 60% for trigonometric IVE and about 15% for hyperbolic IVE, by implementing the proposed algorithm in a commercial circuit simulator through the Verilog-A interface and simulating a variety of circuit blocks such as ring oscillator, ripple adder, and twisted ring counter.

Structural, electrical and dielectric properties of sputtered TiO2 films for Al/TiO2/Si capacitors

Metal-oxide semiconductor capacitors based on titanium dioxide (TiO2) gate dielectrics were prepared by RF magnetron sputtering technique. The deposited films were post-annealed at temperatures in the range 773-1173 K in air for 1 hour. The effect of annealing temperature on the structural properties of TiO2 films was investigated by X-ray diffraction and Raman spectroscopy, the surface morphology was studied by atomic force microscopy (AFM) and the electrical properties of Al/TiO2/p-Si structure were measured recording capacitance-voltage and current-voltage characteristics. The as-deposited films and the films annealed at temperatures lower than 773 K formed in the anatase phase, while those annealed at temperatures higher than 973 K were made of mixtures of the rutile and anatase phases. FTIR analysis revealed that, in the case of films annealed at 1173 K, an interfacial layer had formed, thereby reducing the dielectric constant. The dielectric constant of the as-deposited films was 14 and increased from 25 to 50 with increases in the annealing temperature from 773 to 973 K. The leakage current density of as-deposited films was 1.7 x 10(-5) and decreased from 4.7 X 10(-6) to 3.5 x 10(-9) A/cm(2) with increases in the annealing temperature from 773 to 1173 K. The electrical conduction in the Al/TiO2/p-Si structures was studied on the basis of the plots of Schottky emission, Poole-Frenkel emission and Fowler-Nordheim tunnelling. The effect of structural changes on the current-voltage and capacitance-voltage characteristics of Al/TiO2/p-Si capacitors was also discussed.

Effect of post-deposition annealing on composition and electrical properties of dc reactive magnetron sputtered Al2O3 thin films

We have investigated the effect of post- deposition annealing on the composition and electrical properties of alumina (Al2O3) thin films. Al2O3 were deposited on n-type Si < 100 >. substrates by dc reactive magnetron sputtering. The films were subjected to post- deposition annealing at 623, 823 and 1023 K in vacuum. X-ray photoelectron spectroscopy results revealed that the composition improved with post- deposition annealing, and the film annealed at 1023 K became stoichiometric with an O/Al atomic ratio of 1.49. Al/Al2O3/Si metal-oxide-semiconductor (MOS) structures were then fabricated, and a correlation between the dielectric constant epsilon(r) and interface charge density Q(i) with annealing conditions were studied. The dielectric constant of the Al2O3 thin films increased to 9.8 with post- deposition annealing matching the bulk value, whereas the oxide charge density decreased to 3.11 x 10(11) cm(-2.) Studies on current-voltage IV characteristics indicated ohmic and Schottky type of conduction at lower electric fields (<0.16 MV cm(-1)) and space charge limited conduction at higher electric fields.

Influence of sputter power on structural and electrical properties of TiO2 films for Al/TiO2/Si gate capacitors

Titanium dioxide (TiO2) thin films were deposited onto p-Si substrates held at room temperature by reactive Direct Current (DC) magnetron sputtering at various sputter powers in the range 80-200W. The as-deposited TiO2 films were annealed at a temperature of 1023K. The post-annealed films were characterized for crystallographic structure, chemical binding configuration, surface morphology and optical absorption. The electrical and dielectric properties of Al/TiO2/p-Si structure were determined from the capacitance-voltage and current-voltage characteristics. X-ray diffraction studies confirmed that the as-deposited films were amorphous in nature. After post-annealing at 1023K, the films formed at lower powers exhibited anatase phase, where as those deposited at sputter powers >160W showed the mixed anatase and rutile phases of TiO2. The surface morphology of the films varied significantly with the increase of sputter power. The electrical and dielectric properties on the air-annealed Al/TiO2/p-Si structures were studied. The effect of sputter power on the electrical and dielectric characteristics of the structure of Al/TiO2/p-Si (metal-insulator-semiconductor) was systematically investigated. Copyright (c) 2014 John Wiley & Sons, Ltd.

Effect of film thickness and annealing on optical properties of TiO2 thin films and electrical characterization of MOS capacitors

Titanium dioxide (TiO2) thin films were deposited on glass and silicon (100) substrates by the sol-gel method. The influence of film thickness and annealing temperature on optical transmittance/reflectance of TiO2 films was studied. TiO2 films were used to fabricate metal-oxide-semiconductor capacitors. The capacitance-voltage (C-V), dissipation-voltage (D-V) and current-voltage (I-V) characteristics were studied at different annealing temperatures and the dielectric constant, current density and resistivity were estimated. The loss tangent (dissipation) increased with increase of annealing temperature.

Pt-Poisoning-Free Efficient CO Oxidation on Pt3Co Supported on MgO(100): An Ab Initio Study

Late-transition-metal-doped Pt clusters are prevalent in CO oxidation catalysis, as they exhibit better catalytic activity than pure Pt, while reducing the effective cost and poisoning However, completely eliminating the critical problem of Pt poisoning still poses a big challenge. Here, we report for the first time that, among the bimetallic clusters ((Pt3M where M = Co, Ni, and Cu)/MgO(100)), the CO adsorption site inverts for Pt3Co/MgO(100) from Pt to Co, due to the complete uptake of Pt d-states by lattice oxygen. While this resolves the problem of Pt poisoning, good reaction kinetics are predicted through low barriers for Langmuir-Hinshelwood and Mars van Krevelen (MvK) mechanisms of CO oxidation for Pt3Co/MgO(100) and Li-doped MgO(100), respectively. Li doping in MgO(100) compensates for the charge imbalance caused by a spontaneous oxygen vacancy formation. Pt-3 Co/Li-doped MgO(100) stands out as an exceptional CO oxidation catalyst, giving an MvK reaction barrier as low as 0.11 eV. We thereby propose a novel design strategy of d-band center inversion for CO oxidation catalysts with no Pt poisoning and excellent reaction kinetics.

Effect of Pt doping on the gas sensing properties of porous chromium oxide films through a kinetic response analysis approach

The effect of doping trace amounts of noblemetals (Pt) on the gas sensing properties of chromium oxide thin films, is studied. The sensors are fabricated by depositing chromium oxide films on a glass substrate using a modified spray pyrolysis technique and characterized using X-ray diffraction, scanning electron microscopy, transmission electron microscopy and X-ray photoelectron spectroscopy. The films are porous and nanocrystalline with an average crystallite size of similar to 30 nm. The typical p-type conductivity arises due to the presence of Cr vacancies, formed as a result of Cr non-stoichiometry, which is found to vary upon Pt doping. In order to analyze the effect of doping on the gas sensing properties, we have adopted a kinetic response analysis approach, which is based on Langmuir Adsorption isotherm (LA) theory. The sensor response is analyzed with equations obtained from LA theory and time constants as well as energies of adsorption-desorption are evaluated. It is seen that, Pt doping lowers the Schottky barrier height of the metal oxide semiconductor sensor from 222 meV to 172 meV. Subsequently the reduction in adsorption and desorption energies led to enhancement in sensor response and improvement in the kinetics of the sensor response i.e. the response time as well as recovery times of the sensor.

Growth of TiO2 Films by RF Magnetron Sputtering for MOS Gate Dielectrics: Influence of Substrate Temperature

Titanium dioxide thin films were deposited by RF reactive magnetron sputtering technique on p-type silicon(100) substrates held at temperatures in the range 303-673 K. The influence of substrate temperature on the core level binding energies, chemical bonding configuration, crystallographic structure and dielectric properties was investigated. X-ray photoelectron spectroscopy studies and Fourier transform infrared transmittance data confirmed the formation of stoichiometric films with anatase phase at a substrate temperature of 673 K. The films formed at 303 K were nanocrystalline with amorphous matrix while those deposited at 673 K were transformed in to crystalline phase and growth of grains in pyramidal like structure as confirmed by X-ray diffraction and atomic force microscopy respectively. Metal-oxide-semiconductor capacitors were fabricated with the configuration of Al/TiO2/Si structures. The current voltage, capacitance voltage and conductance voltage characteristics were studied to understand the electrical conduction and dielectric properties of the MOS devices. The leakage current density (at gate voltage of 2 V) decreased from 2.2 x 10(-6) to 1.7 x 10(-7) A/cm(2), the interface trap density decreased from 1.2 x 10(13) to 2.1 x 10(12) cm(-2) eV(-1) and the dielectric constant increased from 14 to 36 with increase of substrate temperature from 303 to 673 K.

High performance sol-gel spin-coated titanium dioxide dielectric based MOS structures

High-kappa TiO2 thin films have been fabricated using cost effective sol-gel and spin-coating technique on p-Si (100) wafer. Plasma activation process was used for better adhesion between TiO2 films and Si. The influence of annealing temperature on the structure-electrical properties of titania films were investigated in detail. Both XRD and Raman studies indicate that the anatase phase crystallizes at 400 degrees C, retaining its structural integrity up to 1000 degrees C. The thickness of the deposited films did not vary significantly with the annealing temperature, although the refractive index and the RMS roughness enhanced considerably, accompanied by a decrease in porosity. For electrical measurements, the films were integrated in metal-oxide-semiconductor (MOS) structure. The electrical measurements evoke a temperature dependent dielectric constant with low leakage current density. The Capacitance-voltage (C-V) characteristics of the films annealed at 400 degrees C exhibited a high value of dielectric constant (similar to 34). Further, frequency dependent C-V measurements showed a huge dispersion in accumulation capacitance due to the presence of TiO2/Si interface states and dielectric polarization, was found to follow power law dependence on frequency (with exponent `s'=0.85). A low leakage current density of 3.6 x 10(-7) A/cm(2) at 1 V was observed for the films annealed at 600 degrees C. The results of structure-electrical properties suggest that the deposition of titania by wet chemical method is more attractive and cost-effective for production of high-kappa materials compared to other advanced deposition techniques such as sputtering, MBE, MOCVD and AID. The results also suggest that the high value of dielectric constant kappa obtained at low processing temperature expands its scope as a potential dielectric layer in MOS device technology. (C) 2015 Elsevier Ltd. All rights reserved.