Effect of annealing temperature on electrical and nano-structural properties of sol-gel derived ZnO thin films

Zinc oxide (ZnO) thin films have been prepared on silicon substrates by sol-gel spin coating technique with spinning speed of 3,000 rpm. The films were annealed at different temperatures from 200 to 500 A degrees C and found that ZnO films exhibit different nanostructures at different annealing temperatures. The X-ray diffraction (XRD) results showed that the ZnO films convert from amorphous to polycrystalline phase after annealing at 400 A degrees C. The metal oxide semiconductor (MOS) capacitors were fabricated using ZnO films deposited on pre-cleaned silicon (100) substrates and electrical properties such as current versus voltage (I-V) and capacitance versus voltage (C-V) characteristics were studied. The electrical resistivity decreased with increasing annealing temperature. The oxide capacitance was measured at different annealing temperatures and different signal frequencies. The dielectric constant and the loss factor (tan delta) were increased with increase of annealing temperature.

Optical, electrical and dielectric properties of TiO(2)-SiO(2) films prepared by a cost effective sol-gel process

Titanium dioxide (TiO(2)) and silicon dioxide (SiO(2)) thin films and their mixed films were synthesized by the sol-gel spin coating method using titanium tetra isopropoxide (TTIP) and tetra ethyl ortho silicate (TEOS) as the precursor materials for TiO(2) and SiO(2) respectively. The pure and composite films of TiO(2) and SiO(2) were deposited on glass and silicon substrates. The optical properties were studied for different compositions of TiO(2) and SiO(2) sols and the refractive index and optical band gap energies were estimated. MOS capacitors were fabricated using TiO(2) films on p-silicon (1 0 0) substrates. The current-voltage (I-V) and capacitance-voltage (C-V) characteristics were studied and the electrical resistivity and dielectric constant were estimated for the films annealed at 200 degrees C for their possible use in optoelectronic applications. (C) 2011 Elsevier B.V. All rights reserved.

Low threshold voltage ZnO thin film transistor with a Zn0.7Mg0.3O gate dielectric for transparent electronics

A highly transparent all ZnO thin film transistor (ZnO-TFT) with a transmittance of above 80% in the visible part of the spectrum, was fabricated by direct current magnetron sputtering, with a bottom gate configuration. The ZnO-TFT with undoped ZnO channel layers deposited on 300 nm Zn0.7Mg0.3O gate dielectric layers attains an on/off ratio of 104 and mobility of 20 cm2/V s. The capacitance-voltage (C−V) characteristics of the ZnO-TFT exhibited a transition from depletion to accumulation with a small hysteresis indicating the presence of oxide traps. The trap density was also computed from the Levinson’s plot. The use of Zn0.7Mg0.3O as a dielectric layer adds additional dimension to its applications. The room temperature processing of the device depicts the possibility of the use of flexible substrates such as polymer substrates. The results provide the realization of transparent electronics for next-generation optoelectronics.

Atomic layer deposition of ZrO2 thin films: Study of growth kinetics and dielectric behaviour

Thin films of ZrO2 have been deposited by ALD on Si(100) and SIMOX using two different metalorganic complexes of Zr as precursors. These films are characterized by X-ray diffraction, transmission and scanning electron microscopies, infrared spectroscopy, and electrical measurements. These show that amorphous ZrO2 films of high dielectric quality may be grown on Si(100) starting about 400degreesC. As the growth temperature is raised, the films become crystalline, the phase formed and the microstructure depending on precursor molecular structure. The phase of ZrO2 formed depends also on the relative duration of the precursor and oxygen pulses. XPS and IR spectroscopy show that films grown at low temperatures contain chemically unbound carbon, its extent depending on the precursor. C-V measurements show that films grown on Si(100) have low interface state density, low leakage current, a hysteresis width of only 10-250 mV and a dielectric constant of similar to16-25.

A comparative study of erbium oxide and gadolinium oxide high-k dielectric thin films grown by low-pressure metalorganic chemical vapour deposition (MOCVD) using beta-Diketonates as precursors

In this paper, a comparative study of thin films of Er2O3 and Gd2O3 grown on n-type Si(100) by low-pressure metalorganic chemical vapour deposition (MOCVD) under the identical conditions has been presented. beta-Diketonate complex of rate earth metals was used as precursor. Description on the evolution of the morphology, structure, optical, and electrical characteristics of films with respect to growth parameters and post-deposition annealing process has been presented. As-gown Gd2O3 films grow with <111> texture, whereas the texture of Er2O3 films strongly depends on the growth temperature (either <100> or <111>). Compositional analysis reveals that the Gd2O3 films grown at or above 500degreesC are carbon free whereas Er2O3 films at upto 525degreesC show the presence of heteroatoms and Er2O3 films grown above 525degreesC are carbon five. The effective dielectric constant is in the range of 7-24, while the fixed charge density is in the range - 10(11) to 10(10) CM-2 as extracted from the C-V characteristics. DC I-V study was carried out to examine the leakage behaviour of films. It reveals that the as-grown Gd2O3 film was very leakey in nature. Annealing of the films in oxidizing ambient for a period of 20 min results in a drastic improvement in the leakage behaviour. The presence of heteroatoms (such as carbon) and their effect on the properties of films are discussed.

Optical, electrical and structural characterization of ZnO:Al thin films prepared by a low cost sol-gel method

ZnO:Al thin films were prepared on glass and silicon substrates by the sol-gel spin coating method. The x-ray diffraction (XRD) results showed that a polycrystalline phase with a hexagonal structure appeared after annealing at 400 degrees C for 1 h. The transmittance increased from 91 to about 93% from pure ZnO films to ZnO film doped with 1 wt% Al and then decreased for 2 wt% Al. The optical band gap energy increased as the doping concentration was increased from 0.5 wt% to 1 wt% Al. The metal oxide semiconductor (MOS) capacitors were fabricated using ZnO films deposited on silicon (100) substrates and electrical properties such as current versus voltage (I-V) and capacitance versus voltage (C-V) characteristics were studied. The electrical resistivity decreased and the leakage current increased with an increase of annealing temperature. The dielectric constant was found to be 3.12 measured at 1 MHz. The dissipation value for the film annealed at 300 degrees C was found to be 3.1 at 5 V. (C) 2011 Elsevier Ltd. All rights reserved.

Study of n-ZnO/p-Si (100) thin film heterojunctions by pulsed laser deposition without buffer layer

ZnO/Si heterojunctions were fabricated by growing ZnO thin films on p-type Si (100) substrate by pulsed laser deposition without buffer layers. The crystallinity of the heterojunction was analyzed by high resolution X-ray diffraction and atomic force microscopy. The optical quality of the film was analyzed by room temperature (RT) photoluminescence measurements. The high intense band to band emission confirmed the high quality of the ZnO thin films on Si. The electrical properties of the junction were studied by temperature dependent current-voltage measurements and RT capacitance-voltage (C-V) analysis. The charge carrier concentration and the barrier height (BH) were calculated, to be 5.6x10(19) cm(-3) and 0.6 eV respectively from the C-V plot. The BH and ideality factor, calculated using the thermionic emission (TE) model, were found to be highly temperature dependent. We observed a much lower value in Richardson constant, 5.19x10(-7)A/cm(2) K-2 than the theoretical value (32 A/cm(2) K-2) for ZnO. This analysis revealed the existence of a Gaussian distribution (GD) with a standard deviation of sigma(2)=0.035 V. By implementing the GD to the TE, the values of BH and Richardson constant were obtained as 1.3 eV and 39.97 A/cm(2) K-2 respectively from the modified Richardson plot. The obtained Richardson constant value is close to the theoretical value for n-ZnO. These high quality heterojunctions can be used for solar cell applications. (C) 2012 Elsevier B.V. All rights reserved.

Influence of Sn doping on structural, optical and electrical properties of ZnO thin films prepared by cost effective sol-gel process

Tin (Sn) doped zinc oxide (ZnO) thin films were synthesized by sol-gel spin coating method using zinc acetate di-hydrate and tin chloride di-hydrate as the precursor materials. The films were deposited on glass and silicon substrates and annealed at different temperatures in air ambient. The agglomeration of grains was observed by the addition of Sn in ZnO film with an average grain size of 60 nm. The optical properties of the films were studied using UV-VIS-NIR spectrophotometer. The optical band gap energies were estimated at different concentrations of Sn. The MOS capacitors were fabricated using Sn doped ZnO films. The capacitance-voltage (C-V), dissipation vs. voltage (D-V) and current-voltage (I-V) characteristics were studied and the electrical resistivity and dielectric constant were estimated. The porosity and surface area of the films were increased with the doping of Sn which makes these films suitable for opto-electronic applications. (C) 2012 Elsevier B.V. All rights reserved.

Effect of Temperature Cycling on Conduction Mechanisms in CdTe Thin Films

CdTe thin films of 500 thickness prepared by thermal evaporation technique were analyzed for leakage current and conduction mechanisms. Metal-insulator-metal (MIM) capacitors were fabricated using these films as a dielectric. These films have many possible applications, such as passivation for infrared diodes that operate at low temperatures (80 K). Direct-current (DC) current-voltage (I-V) and capacitance-voltage (C-V) measurements were performed on these films. Furthermore, the films were subjected to thermal cycling from 300 K to 80 K and back to 300 K. Typical minimum leakage currents near zero bias at room temperature varied between 0.9 nA and 0.1 mu A, while low-temperature leakage currents were in the range of 9.5 pA to 0.5 nA, corresponding to resistivity values on the order of 10(8) a''broken vertical bar-cm and 10(10) a''broken vertical bar-cm, respectively. Well-known conduction mechanisms from the literature were utilized for fitting of measured I-V data. Our analysis indicates that the conduction mechanism in general is Ohmic for low fields < 5 x 10(4) V cm(-1), while the conduction mechanism for fields > 6 x 10(4) V cm(-1) is modified Poole-Frenkel (MPF) and Fowler-Nordheim (FN) tunneling at room temperature. At 80 K, Schottky-type conduction dominates. A significant observation is that the film did not show any appreciable degradation in leakage current characteristics due to the thermal cycling.

Interstitial Defects Induced Ferroelectricity in Undoped ZnO Nanorods at Room Temperature

A simple approach for obtaining room temperature ferroelectricity in ZnO rod structures at the nanoscale is reported. A systematic comparative study between two kinds of nanorods prepared by different processes reveals the physics behind it. It is observed that ZnO nanorods grown (in-situ) by a sol gel method on platinum substrate show ferroelectric behaviour. On the contrary, ZnO nanorods first grown by a sol gel method and then spin-coated on a platinum substrate (ex-situ) do not demonstrate this kind of feature. X-ray diffraction analysis confirms partially (002) and (100) plane oriented growth of both samples. From photoluminescence (PL) spectral analysis it is interpreted that oxygen vacancies/zinc interstitial defects, which arises from the large lattice mismatch between the Pt substrate and the ZnO nanorods grown thereon, and preferential ZnO growth along 002], can be causes of this type of phenomena. C-V characterization, P-E hysteresis loop along with piezoelectric force microscopy support this observation.

Effect of film thickness and annealing on optical properties of TiO2 thin films and electrical characterization of MOS capacitors

Titanium dioxide (TiO2) thin films were deposited on glass and silicon (100) substrates by the sol-gel method. The influence of film thickness and annealing temperature on optical transmittance/reflectance of TiO2 films was studied. TiO2 films were used to fabricate metal-oxide-semiconductor capacitors. The capacitance-voltage (C-V), dissipation-voltage (D-V) and current-voltage (I-V) characteristics were studied at different annealing temperatures and the dielectric constant, current density and resistivity were estimated. The loss tangent (dissipation) increased with increase of annealing temperature.

High performance sol-gel spin-coated titanium dioxide dielectric based MOS structures

High-kappa TiO2 thin films have been fabricated using cost effective sol-gel and spin-coating technique on p-Si (100) wafer. Plasma activation process was used for better adhesion between TiO2 films and Si. The influence of annealing temperature on the structure-electrical properties of titania films were investigated in detail. Both XRD and Raman studies indicate that the anatase phase crystallizes at 400 degrees C, retaining its structural integrity up to 1000 degrees C. The thickness of the deposited films did not vary significantly with the annealing temperature, although the refractive index and the RMS roughness enhanced considerably, accompanied by a decrease in porosity. For electrical measurements, the films were integrated in metal-oxide-semiconductor (MOS) structure. The electrical measurements evoke a temperature dependent dielectric constant with low leakage current density. The Capacitance-voltage (C-V) characteristics of the films annealed at 400 degrees C exhibited a high value of dielectric constant (similar to 34). Further, frequency dependent C-V measurements showed a huge dispersion in accumulation capacitance due to the presence of TiO2/Si interface states and dielectric polarization, was found to follow power law dependence on frequency (with exponent `s'=0.85). A low leakage current density of 3.6 x 10(-7) A/cm(2) at 1 V was observed for the films annealed at 600 degrees C. The results of structure-electrical properties suggest that the deposition of titania by wet chemical method is more attractive and cost-effective for production of high-kappa materials compared to other advanced deposition techniques such as sputtering, MBE, MOCVD and AID. The results also suggest that the high value of dielectric constant kappa obtained at low processing temperature expands its scope as a potential dielectric layer in MOS device technology. (C) 2015 Elsevier Ltd. All rights reserved.

Estimation of background carrier concentration in fully depleted GaN films

Buffer leakage is an important parasitic loss mechanism in AlGaN/GaN high electron mobility transistors (HEMTs) and hence various methods are employed to grow semi-insulating buffer layers. Quantification of carrier concentration in such buffers using conventional capacitance based profiling techniques is challenging due to their fully depleted nature even at zero bias voltages. We provide a simple and effective model to extract carrier concentrations in fully depleted GaN films using capacitance-voltage (C-V) measurements. Extensive mercury probe C-V profiling has been performed on GaN films of differing thicknesses and doping levels in order to validate this model. Carrier concentrations as extracted from both the conventional C-V technique for partially depleted films having the same doping concentration, and Hall measurements show excellent agreement with those predicted by the proposed model thus establishing the utility of this technique. This model can be readily extended to estimate background carrier concentrations from the depletion region capacitances of HEMT structures and fully depleted films of any class of semiconductor materials.

DLTS analysis of amphoteric interface defects in high-TiO2 MOS structures prepared by sol-gel spin-coating

High-kappa TiO2 thin films have been fabricated from a facile, combined sol-gel spin - coating technique on p and n type silicon substrate. XRD and Raman studies headed the existence of anatase phase of TiO2 with a small grain size of 18 nm. The refractive index `n' quantified from ellipsometry is 2.41. AFM studies suggest a high quality, pore free films with a fairly small surface roughness of 6 angstrom. The presence of Ti in its tetravalent state is confirmed by XPS analysis. The defect parameters observed at the interface of Si/TiO2 were studied by capacitance - voltage (C - V) and deep level transient spectroscopy (DLTS). The flat - band voltage (V-FB) and the density of slow interface states estimated are -0.9, -0.44 V and 5.24x10(10), 1.03x10(11) cm(-2); for the NMOS and PMOS capacitors, respectively. The activation energies, interface state densities and capture cross -sections measured by DLTS are E-V + 0.30, E-C - 0.21 eV; 8.73x10(11), 6.41x10(11) eV(-1) cm(-2) and 5.8x10(-23), 8.11x10(-23) cm(2) for the NMOS and PMOS structures, respectively. A low value of interface state density in both P-and N-MOS structures makes it a suitable alternate dielectric layer for CMOS applications. And also very low value of capture cross section for both the carriers due to the amphoteric nature of defect indicates that the traps are not aggressive recombination centers and possibly can not contribute to the device operation to a large extent. (C) 2015 Author(s).

High-kappa TiO2 Thin Film Prepared by Sol-Gel Spin-Coating Method

High-k TiO2 thin film on p-type silicon substrate was fabricated by a combined sol-gel and spin coating method. Thus deposited titania film had anatase phase with a small grain size of 16 nm and surface roughness of congruent to 0.6 nm. The oxide capacitance (C-ox), flat band capacitance (C-FB), flat band voltage (V-FB), oxide trapped charge (Q(ot)), calculated from the high frequency (1 MHz) C-V curve were 0.47 nF, 0.16 nF, -0.91 V, 4.7x10(-12) C, respectively. As compared to the previous reports, a high dielectric constant of 94 at 1 MHz frequency was observed in the devices investigated here and an equivalent oxide thickness (EOT) was 4.1 nm. Dispersion in accumulation capacitance shows a linear relationship with AC frequencies. Leakage current density was found in acceptable limits (2.1e-5 A/cm(2) for -1 V and 5.7e-7 A/cm(2) for +1 V) for CMOS applications.