133 resultados para Decoders (Electronics)


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A new circuit to realise a Schmitt trigger has been conceived. This circuit, which is based on the well known lambda diode, is suitable for integration using CMOS technology. It requires only three devices and is probably simpler than any other conventional Schmitt trigger circuit.

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Lead acid batteries are used in hybrid vehicles and telecommunications power supply. For reliable operation of these systems, an indication of state of charge of battery is essential. To determine the state of charge of battery, current integration method combined with open circuit voltage, is being implemented. To reduce the error in the current integration method the dependence of available capacity as a function of discharge current is determined. The current integration method is modified to incorporate this factor. The experimental setup built to obtain the discharge characterstics of the battery is presented

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Wheelchair is required for the mobility of the disabled people. It can be categorized into two categories: manual, powered wheelchair. This paper deals with series hybrid combination of manual and battery powered wheelchair. The control scheme used is simpler than other hybrid wheelchairs. It includes the sensor less control of the speed. Battery assisted wheelchair (BAW) has less number of components in its hardware. Effort made by rider is reduced considerably. The control scheme also includes the dead man's switch feature. Speed loop is provided for the smooth variation of the speed. The current limit is governed by peak current mode control.

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Some new observations on the phenomenon of photocapacitane on n-type silicon MOS structures under low intensities of illumination are reported. The difference between the illuminated and dark C---characteristics is automatically followed as a function of the applied bias thereby obtaining the differential photocapacitance and the resulting characteristics has been termed as the Low Intensity Differential Photocapacitance (LIDP). For an MOS capacitor, the LIDP characteristics is seen to go through a well defined maximum. The phenomenon has been investigated under different ambient conditions like light intensity, temperature, dependance of the frequency of the light etc. and it has been found that the phenomenon is due to a band excband excitation. In this connection, a novel sensitive technique for the measurement of the capacitance based upon following the frequency changes of a tank circuit is also described in some detail. It is also shown that the phenomenon can be understood by a simple theoretical model.

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Multiplexers, as in the case of binary, are very useful building blocks in the development of quaternary systems. The use of quaternary multiplexer (QMUX) in the implementation of quaternary adder, subtractor and multiplier is described in this paper. Quaternary coded decimal (QCD) adder/subtractor and quaternary excess-3 adder/subtractor realization using QMUX are also proposed

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This paper describes a new analysis of the avalanche breakdown phenomenon in bipolar transistors for different bias conditions of the emitter-base junction. This analysis revolves around the transportation and storage of majority carriers in the base region. Using this analysis one can compute all the voltage-current characteristics of a transistor under avalanche breakdown.

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A modified least mean fourth (LMF) adaptive algorithm applicable to non-stationary signals is presented. The performance of the proposed algorithm is studied by simulation for non-stationarities in bandwidth, centre frequency and gain of a stochastic signal. These non-stationarities are in the form of linear, sinusoidal and jump variations of the parameters. The proposed LMF adaptation is found to have better parameter tracking capability than the LMS adaptation for the same speed of convergence.

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A dual representation scheme for performing arithmetic modulo an arbitrary integer M is presented. The coding scheme maps each integer N in the range 0 <= N < M into one of two representations, each being identified by its most significant bit. The encoding of numbers is straightforward and the problem of checking for unused combinations is eliminated.

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Space-time codes from complex orthogonal designs (CODs) with no zero entries offer low Peak to Average Power Ratio (PAPR) and avoid the problem of switching off antennas. But square CODs for 2(a) antennas with a + 1. complex variables, with no zero entries were discovered only for a <= 3 and if a + 1 = 2(k), for k >= 4. In this paper, a method of obtaining no zero entry (NZE) square designs, called Complex Partial-Orthogonal Designs (CPODs), for 2(a+1) antennas whenever a certain type of NZE code exists for 2(a) antennas is presented. Then, starting from a so constructed NZE CPOD for n = 2(a+1) antennas, a construction procedure is given to obtain NZE CPODs for 2n antennas, successively. Compared to the CODs, CPODs have slightly more ML decoding complexity for rectangular QAM constellations and the same ML decoding complexity for other complex constellations. Using the recently constructed NZE CODs for 8 antennas our method leads to NZE CPODs for 16 antennas. The class of CPODs do not offer full-diversity for all complex constellations. For the NZE CPODs presented in the paper, conditions on the signal sets which will guarantee full-diversity are identified. Simulation results show that bit error performance of our codes is same as that of the CODs under average power constraint and superior to CODs under peak power constraint.

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This paper proposes a multilevel inverter configuration which produces a hexagonal voltage space vector structure in the lower modulation region and a 12-sided polygonal space vector structure in the overmodulation region. A conventional multilevel inverter produces 6n plusmn 1 (n = odd) harmonics in the phase voltage during overmodulation and in the extreme square-wave mode of operation. However, this inverter produces a 12-sided polygonal space vector location, leading to the elimination of 6n plusmn 1 (n = odd) harmonics in the overmodulation region extending to a final 12-step mode of operation with a smooth transition. The benefits of this arrangement are lower losses and reduced torque pulsation in an induction motor drive fed from this converter at higher modulation indexes. The inverter is fabricated by using three conventional cascaded two-level inverters with asymmetric dc-bus voltages. A comparative simulation study of the harmonic distortion in the phase voltage and associated losses in conventional multilevel inverters and that of the proposed inverter is presented in this paper. Experimental validation on a prototype shows that the proposed converter is suitable for high-power applications because of low harmonic distortion and low losses.

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This paper develops a seven-level inverter structure for open-end winding induction motor drives. The inverter supply is realized by cascading four two-level and two three-level neutral-point-clamped inverters. The inverter control is designed in such a way that the common-mode voltage (CMV) is eliminated. DC-link capacitor voltage balancing is also achieved by using only the switching-state redundancies. The proposed power circuit structure is modular and therefore suitable for fault-tolerant applications. By appropriately isolating some of the inverters, the drive can be operated during fault conditions in a five-level or a three-level inverter mode, with preserved CMV elimination and DC-link capacitor voltage balancing, within a reduced modulation range.

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The role of melt convection oil the performance of beat sinks with Phase Change Material (PCM) is presented in this paper. The beat sink consists of aluminum plate fins embedded in PCM and heat flux is supplied from the bottom. The design of such a heat sink requires optimization with respect to its geometrical parameters. The objective of the optimization is to maximize the heat sink operation time for the prescribed heat flux and the critical chip temperature. The parameters considered for optimization are fin number and fill thickness. The height and base plate thickness of heat sink are kept constant in the present analysis. An enthalpy based CFD model is developed, which is capable Of Simulating phase change and associated melt convection. The CFD model is Coupled with Genetic Algorithm (GA) for carrying out the optimization. Two cases are considered, one without melt convection (conduction regime) and the other with convection. It is found that the geometrical optimizations of heat sinks are different for the two cases, indicating the importance of inch convection in the design of heat sinks with PCMs.

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This paper describes a method of adjusting the stator power factor angle for the control of an induction motor fed from a current source inverter (CSI) based on the concept of space vectors (or park vectors). It is shown that under steady state, if the torque angle is kept constant over the entire operating range, it has the advantage of keeping the slip frequency constant. This can be utilized to dispose of the speed feedback and simplify the control scheme for the drive, such that the stator voltage integral zero crossings alone can be used as a feedback for deciding the triggering instants of the CSI thyristors under stable operation of the system. A closed-loop control strategy is developed for the drive based on this principle, using a microprocessor-based control system and is implemented on a laboratory prototype CSI fed induction motor drive.

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The concurrency matrix aids the detection of bit steerability of microcommand sets in a microprogram. In the present work, the concept of don't-cares is introduced into the concurrency matrix to identify the bit steerable microcommand sets.

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Several new liquids impregnants for capacitors have been suggested as possible alternatives to PCB'S which are being replaced in view of their harmful effects.The application of castor oil, a vegetable product, has been studied in the authors laboratary with the same obejective.