Analysis of integrated optofluidic lab-on-a-chip sensor based on refractive index and absorbance sensing

The analysis of a fully integrated optofluidic lab-on-a-chip sensor is presented in this paper. This device is comprised of collinear input and output waveguides that are separated by a microfluidic channel. When light is passed through the analyte contained in the fluidic gap, optical power loss occurs owing to absorption of light. Apart from absorption, a mode-mismatch between the input and output waveguides occurs when the light propagates through the fluidic gap. The degree of mode-mismatch and quantum of optical power loss due to absorption of light by the fluid form the basis of our analysis. This sensor can detect changes in refractive index and changes in concentration of species contained in the analyte. The sensitivity to detect minute changes depends on many parameters. The parameters that influence the sensitivity of the sensor are mode spot size, refractive index of the fluid, molar concentration of the species contained in the analyte, width of the fluidic gap, and waveguide geometry. By correlating various parameters, an optimal fluidic gap distance corresponding to a particular mode spot size that achieves the best sensitivity is determined both for refractive index and absorbance-based sensing.

Efficient Cache Exploration Method for a Tiled Chip Multiprocessor

Past studies use deterministic models to evaluate optimal cache configuration or to explore its design space. However, with the increasing number of components present on a chip multiprocessor (CMP), deterministic approaches do not scale well. Hence, we apply probabilistic genetic algorithms (GA) to determine a near-optimal cache configuration for a sixteen tiled CMP. We propose and implement a faster trace based approach to estimate fitness of a chromosome. It shows up-to 218x simulation speedup over the cycle-accurate architectural simulation. Our methodology can be applied to solve other cache optimization problems such as design space exploration of cache and its partitioning among applications/ virtual machines.

Toward a Scalable Working Set Size Estimation Method and Its Application for Chip Multiprocessors

It is essential to accurately estimate the working set size (WSS) of an application for various optimizations such as to partition cache among virtual machines or reduce leakage power dissipated in an over-allocated cache by switching it OFF. However, the state-of-the-art heuristics such as average memory access latency (AMAL) or cache miss ratio (CMR) are poorly correlated to the WSS of an application due to 1) over-sized caches and 2) their dispersed nature. Past studies focus on estimating WSS of an application executing on a uniprocessor platform. Estimating the same for a chip multiprocessor (CMP) with a large dispersed cache is challenging due to the presence of concurrently executing threads/processes. Hence, we propose a scalable, highly accurate method to estimate WSS of an application. We call this method ``tagged WSS (TWSS)'' estimation method. We demonstrate the use of TWSS to switch-OFF the over-allocated cache ways in Static and Dynamic NonUniform Cache Architectures (SNUCA, DNUCA) on a tiled CMP. In our implementation of adaptable way SNUCA and DNUCA caches, decision of altering associativity is taken by each L2 controller. Hence, this approach scales better with the number of cores present on a CMP. It gives overall (geometric mean) 26% and 19% higher energy-delay product savings compared to AMAL and CMR heuristics on SNUCA, respectively.

Simultaneous measurements of thickness and temperature profile of the lubricant film at chip-tool interface during machining process using luminescent sensors

Simultaneous measurements of thickness and temperature profile of the lubricant film at chip-tool interface during machining have been studied in this experimental programme. Conventional techniques such as thermography can only provide temperature measurement under controlled environment in a laboratory and without the addition of lubricant. The present study builds on the capabilities of luminescent sensors in addition to direct image based observations of the chip-tool interface. A suite of experiments conducted using different types of sensors are reported in this paper, especially noteworthy are concomitant measures of thickness and temperature of the lubricant. (C) 2014 Elsevier Ltd.

Design and Validation of On-chip Planar Mixer Based on Advection and Viscoelastic Effects

Mixing at low Reynolds number is usually due to diffusion and requires longer channel lengths for complete mixing. In order to reduce the mixing lengths, advective flow can be induced by varying the channel geometry. Additionally, in non-newtonian fluids, appropriate modifications to channel geometry can be used to aid the mixing process by capitalizing on their viscoelastic nature. Here we have exploited the advection and viscoelastic effects to implement a planar passive micro-mixer. Microfluidic devices incorporating different blend of mixing geometries were conceived. The optimum design was chosen based on the results of the numerical simulations performed in COMSOL. The chosen design had sudden expansion and contraction along with teeth patterns along the channel walls to improve mixing. Mixing of two different dyes was performed to validate the mixing efficiency. Particle dispersion experiments were also carried out. The results indicated effective mixing. In addition, the same design was also found to be compatible with electrical power free pumping mechanism like suction. The proposed design was then used to carry out on-chip chemical cell lysis with human whole blood samples to establish its use with non-newtonian fluids. Complete lysis of the erythrocytes was observed leaving behind the white blood cells at the outlet.