47 resultados para cooling chip for handheld electronic devices
Resumo:
Low-power electronic devices used in digital telecom exchanges are vulnerable to surge voltages and currents primarily originating from natural lightning or due to the direct interactions between electric power and telecommunication lines, etc., causing the earth/ground potential rise, neutral potential rise, and faults in the system. The fault currents may flow directly to telecom lines or through the equipment to the customer's premises, causing adequate damage to the equipment and personnel safety. In wireline applications, analog or digital, central office, exchanges, and subscriber sides have to be protected. Decisive protection and protective methods have to be employed for proper functioning of the equipment under overvoltage/overcurrent conditions. Current investigation reports some interesting results obtained on the recently developed high-voltage high-current protection cards used in digital telecom exchanges. The performances of protection cards both for the ring wave and hybrid wave surges are evaluated and presented. The surge generators required for the investigation are developed and fabricated in house as per the relevant telecom standards.
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In the last few years, there has been remarkable progress in the development of group III-nitride based materials because of their potential application in fabricating various optoelectronic devices such as light emitting diodes, laser diodes, tandem solar cells and field effect transistors. In order to realize these devices, growth of device quality heterostructures are required. One of the most interesting properties of a semiconductor heterostructure interface is its Schottky barrier height, which is a measure of the mismatch of the energy levels for the majority carriers across the heterojunction interface. Recently, the growth of non-polar III-nitrides has been an important subject due to its potential improvement on the efficiency of III-nitride-based opto-electronic devices. It is well known that the c-axis oriented optoelectronic devices are strongly affected by the intrinsic spontaneous and piezoelectric polarization fields, which results in the low electron-hole recombination efficiency. One of the useful approaches for eliminating the piezoelectric polarization effects is to fabricate nitride-based devices along non-polar and semi-polar directions. Heterostructures grown on these orientations are receiving a lot of focus due to enhanced behaviour. In the present review article discussion has been carried out on the growth of III-nitride binary alloys and properties of GaN/Si, InN/Si, polar InN/GaN, and nonpolar InN/GaN heterostructures followed by studies on band offsets of III-nitride semiconductor heterostructures using the x-ray photoelectron spectroscopy technique. Current transport mechanisms of these heterostructures are also discussed.
Resumo:
Two-dimensional materials and their heterostructures have emerged as a new class of materials, not only for fundamental physics but also for electronic and optoelectronic applications. Black phosphorus (BP) is a relatively new addition to this class of materials. Its strong in-plane anisotropy makes BP a unique material for making conceptually new types of electronic devices. However, the global density of states (DOS) of BP in device geometry has not been measured experimentally. Here, we report the quantum capacitance measurements together with the conductance measurements on an hBN-protected few-layer BP (similar to six layers) in a dual-gated field effect transistor (FET) geometry. The measured DOS from our quantum capacitance is compared with density functional theory (DFT). Our results reveal that the transport gap for quantum capacitance is smaller than that in conductance measurements due to the presence of localized states near the band edge. The presence of localized states is confirmed by the variable range hopping seen in our temperature dependence conductivity. A large asymmetry is observed between the electron and hole side. This asymmetric nature is attributed to the anisotropic band dispersion of BP. Our measurements establish the uniqueness of quantum capacitance in probing the localized states near the band edge, hitherto not seen in conductance measurements.
Resumo:
Electromagnetic shielding has become important for various electrical systems because of the electromagnetic pollution caused by the large scale use of electronic devices operating at different frequencies and power levels. Traditionally used metallic shields lack flexibility and hence may not be the right choice for certain applications. In such situations, filled polymer composites provide a good alternative for electromagnetic shielding applications. Being polymer based, they are easy to manufacture and can be molded into the required geometry and shape. In this study, the shielding properties of multiwalled carbon nanotubes and carbon nanofibers filled silicone rubber are studied. The conductivity and the shielding effectiveness of the composites were measured at different filler loadings. Both the fillers are able to make the base polymer conducting even at very low filler loadings. The conductivity and the shielding effectiveness improved when the filler loading was above the percolation threshold.
Resumo:
A microchip thermocycler, fabricated from silicon and Pyrex #7740 glass, is described. Usual resistive heating has been replaced by induction heating, leading to much simpler fabrication steps. Heating and cooling rates of 6.5 and 4.2 degreesC/s, respectively have been achieved, by optimising the heater dimensions and heating frequency (similar to200 kHz). Four devices are mounted on a heater, resulting in low power consumption (similar to 1.4 W per device on the average). Using simple on-off electronic temperature control, a temperature stability within -0.2 degreesC is achieved. Features such as induction heating, good temperature control, battery operation, and low power consumption make the device suitable for portable applications, particularly in polymerase chain reaction (PCR) systems. (C) 2002 Elsevier Science B.V. All rights reserved.
Resumo:
The temperature variation in the insulation around an electronic component, mounted on a horizontal circuit board is studied numerically. The flow is assumed to be laminar and fully developed. The effect of mixed convection and two different types of insulation are considered. The mass, momentum and energy conservation equations in the fluid and conduction equation in the insulation are solved using the SIMPLER algorithm. Computations are carried out for liquid Freon and water, for different conductivity ratios, and different Rayleigh numbers. It is demonstrated that the temperature variation within the insulation becomes important when the thermal conductivity of the insulation is less than ten times the thermal conductivity of the cooling medium.
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The miniaturization of electronic and ionic devices with thermionic cathodes and thc improvement of their vacuum properties are questions of very great interest to the electronic engineer. However there have bcen no proposals so far to analyse the problem of miniaturization of such devices In a fundamental way. The present work suggests a choice of the geometrical shape of the cathode, the anode and the envelope of the device, that may help towards such a fundamcnlal approach.It is shown that a design, in which the cathode and the envelope of the tube are made of thm prismatic shape and the anode coincides with the cnvclope, offers a slriknrg advantage over the conventional cylindrical design, in respect of over-all size. The use of the prismatic shape will lead to considerable economy in msterials and may facilitate simpler prodoct~ont echn~ques. I n respect of the miin criteria of vacuum, namely the grade of vacuum, the internal volume occupied by residual gases, the evolution of gases in the internal space and the diffusion of gases from outside into the devicc, it is shown that the prismatic form is at least as good as, if not somewhat superior lo, the cylindrical form.In the actual construction of thin prismatic tubes, manv practical problems will arise, the most important being the mechanical strength and stablity of the structure. But the changeover from the conventional cylindrical to the new prirmaiic form, with its basic advantages, is a development that merits close attention.
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Vertically aligned zinc oxide nanorods (ZnO NRs) were synthesized on kapton flexible sheets using a simple and cost-effective three-step process (electrochemical seeding, annealing under ambient conditions, and chemical solution growth). Scanning electron microscopy studies reveal that ZnO NRs grown on seed-layers, developed by electrochemical deposition at a negative potential of 1.5 V over a duration of 2.5 min and annealed at 200 degrees C for 2 h, consist of uniform morphology and good chemical stoichiometry. Transmission electron microscopy analyses show that the as-grown ZnO NRs have single crystalline hexagonal structure with a preferential growth direction of < 001 >. Highly flexible p-n junction diodes fabricated by using p-type conductive polymer exhibited excellent diode characteristics even under the fold state.
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Numerical modeling is used to explain the origin of the large ON/OFF ratios, ultralow leakage, and high ON-current densities exhibited by back-end-of-the-line-friendly access devices based on copper-containing mixed-ionic-electronic-conduction (MIEC) materials. Hall effect measurements confirm that the electronic current is hole dominated; a commercial semiconductor modeling tool is adapted to model MIEC. Motion of large populations of copper ions and vacancies leads to exponential increases in hole current, with a turn-ON voltage that depends on material bandgap. Device simulations match experimental observations as a function of temperature, electrode aspect ratio, thickness, and device diameter.
Resumo:
Emerging embedded applications are based on evolving standards (e.g., MPEG2/4, H.264/265, IEEE802.11a/b/g/n). Since most of these applications run on handheld devices, there is an increasing need for a single chip solution that can dynamically interoperate between different standards and their derivatives. In order to achieve high resource utilization and low power dissipation, we propose REDEFINE, a polymorphic ASIC in which specialized hardware units are replaced with basic hardware units that can create the same functionality by runtime re-composition. It is a ``future-proof'' custom hardware solution for multiple applications and their derivatives in a domain. In this article, we describe a compiler framework and supporting hardware comprising compute, storage, and communication resources. Applications described in high-level language (e.g., C) are compiled into application substructures. For each application substructure, a set of compute elements on the hardware are interconnected during runtime to form a pattern that closely matches the communication pattern of that particular application. The advantage is that the bounded CEs are neither processor cores nor logic elements as in FPGAs. Hence, REDEFINE offers the power and performance advantage of an ASIC and the hardware reconfigurability and programmability of that of an FPGA/instruction set processor. In addition, the hardware supports custom instruction pipelining. Existing instruction-set extensible processors determine a sequence of instructions that repeatedly occur within the application to create custom instructions at design time to speed up the execution of this sequence. We extend this scheme further, where a kernel is compiled into custom instructions that bear strong producer-consumer relationship (and not limited to frequently occurring sequences of instructions). Custom instructions, realized as hardware compositions effected at runtime, allow several instances of the same to be active in parallel. A key distinguishing factor in majority of the emerging embedded applications is stream processing. To reduce the overheads of data transfer between custom instructions, direct communication paths are employed among custom instructions. In this article, we present the overview of the hardware-aware compiler framework, which determines the NoC-aware schedule of transports of the data exchanged between the custom instructions on the interconnect. The results for the FFT kernel indicate a 25% reduction in the number of loads/stores, and throughput improves by log(n) for n-point FFT when compared to sequential implementation. Overall, REDEFINE offers flexibility and a runtime reconfigurability at the expense of 1.16x in power and 8x in area when compared to an ASIC. REDEFINE implementation consumes 0.1x the power of an FPGA implementation. In addition, the configuration overhead of the FPGA implementation is 1,000x more than that of REDEFINE.
Resumo:
A large part of today's multi-core chips is interconnect. Increasing communication complexity has made essential new strategies for interconnects, such as Network on Chip. Power dissipation in interconnects has become a substantial part of the total power dissipation. Techniques to reduce interconnect power have thus become a necessity. In this paper, we present a design methodology that gives values of bus width for interconnect links, frequency of operation for routers, in Network on Chip scenario that satisfy required throughput and dissipate minimal switching power. We develop closed form analytical expressions for the power dissipation, with bus width and frequency as variables and then use Lagrange multiplier method to arrive at the optimal values. We present a 4 port router in 90 nm technology library as case study. The results obtained from analysis are discussed.
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A laboratory model of a thermally driven adsorption refrigeration system with activated carbon as the adsorbent and 1,1,1,2-tetrafluoroethane (HFC 134a) as the refrigerant was developed. The single stage compression system has an ensemble of four adsorbers packed with Maxsorb II specimen of activated carbon that provide a near continuous flow which caters to a cooling load of up to 5W in the 5-18 degrees C region. The objective was to utilise the low grade thermal energy to drive a refrigeration system that can be used to cool some critical electronic components. The laboratory model was tested for it performance at various cooling loads with the heat source temperature from 73 to 93 degrees C. The pressure transients during heating and cooling phases were traced. The cyclic steady state and transient performance data are presented. (C) 2010 Elsevier Ltd. All rights reserved.
Resumo:
An algorithm for optimal allocation of reactive power in AC/DC system using FACTs devices, with an objective of improving the voltage profile and also voltage stability of the system has been presented. The technique attempts to utilize fully the reactive power sources in the system to improve the voltage stability and profile as well as meeting the reactive power requirements at the AC-DC terminals to facilitate the smooth operation of DC links. The method involves successive solution of steady-state power flows and optimization of reactive power control variables with Unified Power Flow Controller (UPFC) using linear programming technique. The proposed method has been tested on a real life equivalent 96-bus AC and a two terminal DC system under normal and contingency conditions.
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In this paper we develop an analytical heat transfer model, which is capable of analyzing cyclic melting and solidification processes of a phase change material used in the context of electronics cooling systems. The model is essentially based on conduction heat transfer, with treatments for convection and radiation embedded inside. The whole solution domain is first divided into two main sub-domains, namely, the melting sub-domain and the solidification sub-domain. Each sub-domain is then analyzed for a number of temporal regimes. Accordingly, analytical solutions for temperature distribution within each subdomain are formulated either using a semi-infinity consideration, or employing a method of quasi-steady state, depending on the applicability. The solution modules are subsequently united, leading to a closed-form solution for the entire problem. The analytical solutions are then compared with experimental and numerical solutions for a benchmark problem quoted in the literature, and excellent agreements can be observed.
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Conjugated polymers are intensively pursued as candidate materials for emission and detection devices with the optical range of interest determined by the chemical structure. On the other hand the optical range for emission and detection can also be tuned by size selection in semiconductor nanoclusters. The mechanisms for charge generation and separation upon optical excitation, and light emission are different for these systems. Hybrid systems based on these different class of materials reveal interesting electronic and optical properties and add further insight into the individual characteristics of the different components. Multilayer structures and blends of these materials on different substrates were prepared for absorption, photocurrent (Iph), photoluminescence (PL) and electroluminscence (EL) studies. Polymers chosen were derivatives of polythiophene (PT) and polyparaphenylenevinylene (PPV) along with nanoclusters of cadmium sulphide of average size 4.4 nm (CdS-44). The photocurrent spectral response in these systems followed the absorption response around the band edges for each of the components and revealed additional features, which depended on bias voltage, thickness of the layers and interfacial effects. The current-voltage curves showed multi-component features with emission varying for different regimes of voltage. The emission spectral response revealed additive features and is discussed in terms of excitonic mechanisms.