New approach to distance relays with quadrilateral polar characteristic for e.h.v.-line protection

A new technique is presented using principles of multisignal relaying for the synthesis of a universal-type quadrilateral polar characteristic. The modus operandi consists in the determination of the phase sequence of a set of voltage phasors and the provision of a trip signal for one sequence while blocking for the other. Two versions, one using ferrite-core logic and another using transistor logic, are described in detail. The former version has the merit of simplicity and has the added advantage of not requiring any d.c. supply. The unit is flexible, as it permits independent control of the characteristic along the resistance and reactance axis through suitable adjustments of replica impedance angles. The maximum operating time is about 20ms for all switching angles, and with faults within 95% of the protected section. The maximum transient overreach is about 8%.

Optimal static voltage stability improvement using a numerically stable SLP algorithm, for real time applications

A numerically stable sequential Primal–Dual LP algorithm for the reactive power optimisation (RPO) is presented in this article. The algorithm minimises the voltage stability index C 2 [1] of all the load buses to improve the system static voltage stability. Real time requirements such as numerical stability, identification of the most effective subset of controllers for curtailing the number of controllers and their movement can be handled effectively by the proposed algorithm. The algorithm has a natural characteristic of selecting the most effective subset of controllers (and hence curtailing insignificant controllers) for improving the objective. Comparison with transmission loss minimisation objective indicates that the most effective subset of controllers and their solution identified by the static voltage stability improvement objective is not the same as that of the transmission loss minimisation objective. The proposed algorithm is suitable for real time application for the improvement of the system static voltage stability.

An insight into real-time performance assessment of a building integrated photovoltaic (BIPV) installation in Bangalore (India)

Building integrated photovoltaic (BIPV) applications are gaining widespread popularity. The performance of any given BIPV system is dependent on prevalent meteorological factors, site conditions and system characteristics. Investigations pertaining to the performance assessment of photovoltaic (PV) systems are generally confined to either controlled environment-chambers or computer-based simulation studies. Such investigations fall short of providing a realistic insight into how a PV system actually performs real-time. Solar radiation and the PV cell temperature are amongst the most crucial parameters affecting PV output. The current paper deals with the real-time performance assessment of a recently commissioned 5.25 kW, BIPV system installed at the Center for Sustainable Technologies, Indian Institute of Science, Bangalore. The overall average system efficiency was found to be 6% for the period May 2011-April 2012. This paper provides a critical appraisal of PV system performance based on ground realities, particularly characteristic to tropical (moderate) regions such as Bangalore, India. (C) 2013 International Energy Initiative. Published by Elsevier Inc. All rights reserved.

Wide Voltage Input Receiver with Hysteresis Characteristic to Reduce Input Signal Noise Effect

In this paper, an input receiver with a hysteresis characteristic that can work at voltage levels between 0.9 V and 5 V is proposed. The input receiver can be used as a wide voltage range Schmitt trigger also. At the same time, reliable circuit operation is ensured. According to the research findings, this is the first time a wide voltage range Schmitt trigger is being reported. The proposed circuit is compared with previously reported input receivers, and it is shown that the circuit has better noise immunity. The proposed input receiver ends the need for a separate Schmitt trigger and input buffer. The frequency of operation is also higher than that of the previously reported receiver. The circuit is simulated using HSPICE at 035-mu m standard thin oxide technology. Monte Carlo analysis is conducted at different process conditions, showing that the proposed circuit works well for different process conditions at different voltage levels of operation. A noise impulse of (V-CC/2) magnitude is added to the input voltage to show that the receiver receives the correct logic level even in the presence of noise. Here, V-CC is the fixed voltage supply of 3.3 V.