225 resultados para Processing Speed


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The rectangular dielectric waveguide is the most commonly used structure in integrated optics, especially in semi-conductor diode lasers. Demands for new applications such as high-speed data backplanes in integrated electronics, waveguide filters, optical multiplexers and optical switches are driving technology toward better materials and processing techniques for planar waveguide structures. The infinite slab and circular waveguides that we know are not practical for use on a substrate because the slab waveguide has no lateral confinement and the circular fiber is not compatible with the planar processing technology being used to make planar structures. The rectangular waveguide is the natural structure. In this review, we have discussed several analytical methods for analyzing the mode structure of rectangular structures, beginning with a wave analysis based on the pioneering work of Marcatili. We study three basic techniques with examples to compare their performance levels. These are the analytical approach developed by Marcatili, the perturbation techniques, which improve on the analytical solutions and the effective index method with examples.

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In the present investigation, two nozzle configurations are used for spray deposition, convergent nozzle (nozzle-A), and convergent nozzle with 2 mm parallel portion attached at its end (nozzle-C) without changing the exit area. First, the conditions for subambient aspiration pressure, i.e., pressure at the tip of the melt delivery tube, are established by varying the protrusion length of the melt delivery tube at different applied gas pressures for both of the nozzles. Using these conditions, spray deposits in a reproducible manner are successfully obtained for 7075 Al alloy. The effect of applied gas pressure, flight distance, and nozzle configuration on various characteristics of spray deposition, viz., yield, melt flow rate, and gas-to-metal ratio, is examined. The over-spray powder is also characterized with respect to powder size distribution, shape, and microstructure. Some of the results are explained with the help of numerical analysis presented in an earlier article.

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A systematic study of Ar ion implantation in cupric oxide films has been reported. Oriented CuO films were deposited by pulsed excimer laser ablation technique on (1 0 0) YSZ substrates. X-ray diffraction (XRD) spectra showed the highly oriented nature of the deposited CuO films. The films were subjected to ion bombardment for studies of damage formation, Implantations were carried out using 100 keV Arf over a dose range between 5 x 10(12) and 5 x 10(15) ions/cm(2). The as-deposited and ion beam processed samples were characterized by XRD technique and resistance versus temperature (R-T) measurements. The activation energies for electrical conduction were found from In [R] versus 1/T curves. Defects play an important role in the conduction mechanism in the implanted samples. The conductivity of the film increases, and the corresponding activation energy decreases with respect to the dose value.

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The effect of deposition of Al +Al2O3 on MRI 153 M Mg alloy processed using a pulsed Nd:YAG laser is presented in this study. A composite coating with metallurgical joint to the substrate was formed. The microstructure and phase constituents were characterized and correlated with the thermal predictions. The laser scan speed had an effect on the average melt depth and the amount of retained and/or reconstituted alumina in the final coating. The coating consisted of alumina particles and highly refined dendrites formed due to the extremely high cooling rates (of the order of 10(8) K/s). The microhardness of the coating was higher and several fold improvement of wear resistance compared to the substrate was observed for the coatings. These microstructural features and physical properties were correlated with the effects predicted by a thermal model.

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Al-5 wt pct Si alloy is processed by upset forging in the temperature range 300 K to 800 K and in the strain rate range 0.02 to 200 s−1. The hardness and tensile properties of the product have been studied. A “safe” window in the strain rate-temperature field has been identified for processing of this alloy to obtain maximum tensile ductility in the product. For the above strain rate range, the temperature range of processing is 550 K to 700 K for obtaining high ductility in the product. On the basis of microstructure and the ductility of the product, the temperature-strain rate regimes of damage due to cavity formation at particles and wedge cracking have been isolated for this alloy. The tensile fracture features recorded on the product specimens are in conformity with the above damage mechanisms. A high temperature treatment above ≈600 K followed by fairly fast cooling gives solid solution strengthening in the alloy at room temperature.

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In this paper the implementation and application of a microprocessor-based medium speed experimental local area network using a coaxial cable transmission medium are dealt with. A separate unidirectional control wire has been used in order to provide a collision-free and fair medium access arbitration. As an application of the network, the design of a packet voice communication system is discussed.

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Experiments are described which show that a monobath can be used for rapid in situ processing in a liquid gate for real-time holographic interferometry. This also permits utilization of a very simple solution handling system. Changes in emulsion thickness are reduced to an acceptable level and problems of matching refractive indices are eliminated by exposing and viewing the holograms in water. Excellent null patterns are obtained and real-time holographic interferometry can be carried out over long periods of time.

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The operational life and reliability of I.C. engines are limited to a certain extent by the break down of the engine components due to wear. It is advantageous to know the condition of an engine and its components without disassembling for detailed measurements. This paper describes the possibility of employing chemical analysis of the used crank case oil to predict the wear of engine components. It is concluded that the acidity and carbon contents of the crank case oil play a significant role in assessing the wear of copper-lead bearings used for the big end of the connecting rod.

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Recently established moderate size free piston driven hypersonic shock tunnel HST3 along with its calibration is described here. The extreme thermodynamic conditions prevalent behind the reflected shock wave have been utilized to study the catalytic and non-catalytic reactions of shock heated test gases like Ar, N2 or O2 with different material like C60 carbon, zirconia and ceria substituted zirconia. The exposed test samples are investigated using different experimental methods. These studies show the formation of carbon nitride due to the non-catalytic interaction of shock heated nitrogen gas with C60 carbon film. On the other hand, the ZrO2 undergoes only phase transformation from cubic to monoclinic structure and Ce0.5Zr0.5O2 in fluorite cubic phase changes to pyrochlore (Ce2Zr2O7±δ) phase by releasing oxygen from the lattice due to heterogeneous catalytic surface reaction.

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Forward facing circular nose cavity of 6 mm diameter in the nose portion of a generic missile shaped bodies is proposed to reduce the stagnation zone heat transfer. About 25% reduction in stagnation zone heat transfer is measured using platinum thin film sensors at Mach 8 in the IISc hypersonic shock tunnel. The presence of nose cavity does not alter the fundamental aerodynamic coefficients of the slender body. The experimental results along with the numerically predicted results is also discussed in this paper.

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The operational life and reliability of I.C. engines are limited to a certain extent by the break down of the engine components due to wear. It is advantageous to know the condition of an engine and its components without disassembling for detailed measurements. This paper describes the possibility of employing chemical analysis of the used crank case oil to predict the wear of engine components. It is concluded that the acidity and carbon contents of the crank case oil play a significant role in assessing the wear of copper-lead bearings used for the big end of the connecting rod.

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An important limitation of the existing IGC algorithms, is that they do not explicitly exploit the inherent time scale separation that exist in aerospace vehicles between rotational and translational motions and hence can be ineffective. To address this issue, a two-loop partial integrated guidance and control (PIGC) scheme has been proposed in this paper. In this design, the outer loop uses a recently developed, computationally efficient, optimal control formulation named as model predictive static programming. It gives the commanded pitch and yaw rates whereas necessary roll-rate command is generated from a roll-stabilization loop. The inner loop tracks the outer loop commands using the Dynamic inversion philosophy. Uncommonly, Six-Degree of freedom (Six-DOF) model is used directly in both the loops. This intelligent manipulation preserves the inherent time scale separation property between the translational and rotational dynamics, and hence overcomes the deficiency of current IGC designs, while preserving its benefits. Comparative studies of PIGC with one loop IGC and conventional three loop design were carried out for engaging incoming high speed target. Simulation studies demonstrate the usefulness of this method.

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Multiresolution synthetic aperture radar (SAR) image formation has been proven to be beneficial in a variety of applications such as improved imaging and target detection as well as speckle reduction. SAR signal processing traditionally carried out in the Fourier domain has inherent limitations in the context of image formation at hierarchical scales. We present a generalized approach to the formation of multiresolution SAR images using biorthogonal shift-invariant discrete wavelet transform (SIDWT) in both range and azimuth directions. Particularly in azimuth, the inherent subband decomposition property of wavelet packet transform is introduced to produce multiscale complex matched filtering without involving any approximations. This generalized approach also includes the formulation of multilook processing within the discrete wavelet transform (DWT) paradigm. The efficiency of the algorithm in parallel form of execution to generate hierarchical scale SAR images is shown. Analytical results and sample imagery of diffuse backscatter are presented to validate the method.

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In this article, we study traffic flow in the presence of speed breaking structures. The speed breakers are typically used to reduce the local speed of vehicles near certain institutions such as schools and hospitals. Through a cellular automata model we study the impact of such structures on global traffic characteristics. The simulation results indicate that the presence of speed breakers could reduce the global flow under moderate global densities. However, under low and high global density traffic regime the presence of speed breakers does not have an impact on the global flow. Further the speed limit enforced by the speed breaker creates a phase distinction. For a given global density and slowdown probability, as the speed limit enforced by the speed breaker increases, the traffic moves from the reduced flow phase to maximum flow phase. This underlines the importance of proper design of these structures to avoid undesired flow restrictions.

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Emerging embedded applications are based on evolving standards (e.g., MPEG2/4, H.264/265, IEEE802.11a/b/g/n). Since most of these applications run on handheld devices, there is an increasing need for a single chip solution that can dynamically interoperate between different standards and their derivatives. In order to achieve high resource utilization and low power dissipation, we propose REDEFINE, a polymorphic ASIC in which specialized hardware units are replaced with basic hardware units that can create the same functionality by runtime re-composition. It is a ``future-proof'' custom hardware solution for multiple applications and their derivatives in a domain. In this article, we describe a compiler framework and supporting hardware comprising compute, storage, and communication resources. Applications described in high-level language (e.g., C) are compiled into application substructures. For each application substructure, a set of compute elements on the hardware are interconnected during runtime to form a pattern that closely matches the communication pattern of that particular application. The advantage is that the bounded CEs are neither processor cores nor logic elements as in FPGAs. Hence, REDEFINE offers the power and performance advantage of an ASIC and the hardware reconfigurability and programmability of that of an FPGA/instruction set processor. In addition, the hardware supports custom instruction pipelining. Existing instruction-set extensible processors determine a sequence of instructions that repeatedly occur within the application to create custom instructions at design time to speed up the execution of this sequence. We extend this scheme further, where a kernel is compiled into custom instructions that bear strong producer-consumer relationship (and not limited to frequently occurring sequences of instructions). Custom instructions, realized as hardware compositions effected at runtime, allow several instances of the same to be active in parallel. A key distinguishing factor in majority of the emerging embedded applications is stream processing. To reduce the overheads of data transfer between custom instructions, direct communication paths are employed among custom instructions. In this article, we present the overview of the hardware-aware compiler framework, which determines the NoC-aware schedule of transports of the data exchanged between the custom instructions on the interconnect. The results for the FFT kernel indicate a 25% reduction in the number of loads/stores, and throughput improves by log(n) for n-point FFT when compared to sequential implementation. Overall, REDEFINE offers flexibility and a runtime reconfigurability at the expense of 1.16x in power and 8x in area when compared to an ASIC. REDEFINE implementation consumes 0.1x the power of an FPGA implementation. In addition, the configuration overhead of the FPGA implementation is 1,000x more than that of REDEFINE.