Numerical Study of Heat Transfer From Pin-Fin Heat Sink Using Steady and Pulsated Impinging Jets

This paper investigates numerically the heat transfer characteristics of confined slot jet impingement on a pin-fin heat sink. A variety of pin-fin heat sinks is investigated, and the resulting enhancement of heat transfer studied. The distribution of heat transfer coefficient on the top surface of the base plate and that along the fin height are examined. Both steady and pulsated jets are studied. It is observed that for a steady jet impingement on a pin-fin heat sink, the effective heat transfer coefficient increases with fin height, leading to a corresponding decrease in base plate temperature for the same heat flux. In the case of pulsated jets, the influence of pulse frequency and the Reynolds number is examined, and their effect on the effective heat transfer coefficient is studied.

New algorithms of the Q-learning type

We propose two algorithms for Q-learning that use the two-timescale stochastic approximation methodology. The first of these updates Q-values of all feasible state–action pairs at each instant while the second updates Q-values of states with actions chosen according to the ‘current’ randomized policy updates. A proof of convergence of the algorithms is shown. Finally, numerical experiments using the proposed algorithms on an application of routing in communication networks are presented on a few different settings.

Sensor network deployment for agronomical data gathering in semi-arid regions

We share our experience in planning, designing and deploying a wireless sensor network of one square kilometre area. Environmental data such as soil moisture, temperature, barometric pressure, and relative humidity are collected in this area situated in the semi-arid region of Karnataka, India. It is a hope that information derived from this data will benefit the marginal farmer towards improving his farming practices. Soon after establishing the need for such a project, we begin by showing the big picture of such a data gathering network, the software architecture we have used, the range measurements needed for determining the sensor density, and the packaging issues that seem to play a crucial role in field deployments. Our field deployment experiences include designing with intermittent grid power, enhancing software tools to aid quicker and effective deployment, and flash memory corruption. The first results on data gathering look encouraging.

Stability of systems with power-law non-linearities

It is shown that a sufficient condition for the asymptotic stability-in-the-large of an autonomous system containing a linear part with transfer function G(jω) and a non-linearity belonging to a class of power-law non-linearities with slope restriction [0, K] in cascade in a negative feedback loop is ReZ(jω)[G(jω) + 1 K] ≥ 0 for all ω where the multiplier is given by, Z(jω) = 1 + αjω + Y(jω) - Y(-jω) with a real, y(t) = 0 for t < 0 and ∫ 0 ∞ |y(t)|dt < 1 2c2, c2 being a constant associated with the class of non-linearity. Any allowable multiplier can be converted to the above form and this form leads to lesser restrictions on the parameters in many cases. Criteria for the case of odd monotonic non-linearities and of linear gains are obtained as limiting cases of the criterion developed. A striking feature of the present result is that in the linear case it reduces to the necessary and sufficient conditions corresponding to the Nyquist criterion. An inequality of the type |R(T) - R(- T)| ≤ 2c2R(0) where R(T) is the input-output cross-correlation function of the non-linearity, is used in deriving the results.

Ring-Opening-Induced Toughening of a Low-Permittivity Polymer-Metal Interface

Integrating low dielectric permittivity (low-k) polymers to metals is an exacting fundamental challenge because poor bonding between low-polarizability moieties and metals precludes good interfacial adhesion. Conventional adhesion-enhancing methods such as using intermediary layers are unsuitable for engineering polymer/metal interfaces for many applications because of the collateral increase in dielectric permittivity. Here, we demonstrate a completely new approach without surface treatments or intermediary layers to obtain an excellent interfacial fracture toughness of > 13 J/m(2) in a model system comprising copper. and a cross-linked polycarbosilane with k similar to 2.7 obtained by curing a cyclolinear polycarbosilane in air.Our results suggest that interfacial oxygen catalyzed molecularring-opening and anchoring of the opened ring moieties of the polymer to copper is the main toughening mechanism. This novel approach of realizing adherent low-k polymer/metal structures without intermediary layers by activating metal-anchoring polymer moieties at the interface could be adapted for applications such as device wiring and packaging, and laminates and composites.

Studies on design, fabrication and reliability assessment of embedded passives on a high-density interconnect (HDI) organic substrate using a sequential build-up process

One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization.This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO3) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm(2). Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (similar to 0.015 at 1 GHz) and proposed low-loss BCB dielectric (similar to 0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo -mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations.Also, a prototype working product with the board level design including features of embedded resistors and capacitors are underway. Preliminary results of these are presented.

Al/SiC carriers for microwave integrated circuits by a new technique of pressureless infiltration

Materials with high thermal conductivity and thermal expansion coefficient matching with that of Si or GaAs are being used for packaging high density microcircuits due to their ability of faster heat dissipation. Al/SiC is gaining wide acceptance as electronic packaging material due to the fact that its thermal expansion coefficient can be tailored to match with that of Si or GaAs by varying the Al:SiC ratio while maintaining the thermal conductivity more or less the same. In the present work, Al/SiC microwave integrated circuit (MIC) carriers have been fabricated by pressureless infiltration of Al-alloy into porous SiC preforms in air. This new technique provides a cheaper alternative to pressure infiltration or pressureless infiltration in nitrogen in producing Al/SiC composites for electronic packaging applications. Al-alloy/65vol% SiC composite exhibited a coefficient of thermal expansion of 7 x 10(-6) K-1 (25 degrees C-100 degrees C) and a thermal conductivity of 147 Wm(-1) K-1 at 30 degrees C. The hysteresis observed in thermal expansion coefficient of the composite in the temperature range 100 degrees C-400 degrees C has been attributed to the presence of thermal residual stresses in the composite. Thermal diffusivity of the composite measured over the temperature range from 30 degrees C to 400 degrees C showed a 55% decrease in thermal diffusivity with temperature. Such a large decrease in thermal diffusivity with temperature could be due to the presence of micropores, microcracks, and decohesion of the Al/SiC interfaces in the microstructure (all formed during cooling from the processing temperature). The carrier showed satisfactory performance after integrating it into a MIC.

Theoretical and Experimental Studies on an Ammonia-Based Loop Heat Pipe With a Flat Evaporator

An ammonia loop heat pipe (LHP) with a flat plate evaporator is developed and tested. The device uses a nickel wick encased in an aluminum-stainless steel casing. The loop is tested for various heat loads and different sink temperatures, and it demonstrated reliable startup characteristics. Results with the analysis of the experimental observation indicate that the conductance between the compensation chamber and the heater plate can significantly influence the operating temperatures of the LHP. A mathematical model is also presented which is validated against the experimental observations.

A homotopy approach for stabilizing single-input systems with control structure constraints

A linear state feedback gain vector used in the control of a single input dynamical system may be constrained because of the way feedback is realized. Some examples of feedback realizations which impose constraints on the gain vector are: static output feedback, constant gain feedback for several operating points of a system, and two-controller feedback. We consider a general class of problems of stabilization of single input dynamical systems with such structural constraints and give a numerical method to solve them. Each of these problems is cast into a problem of solving a system of equalities and inequalities. In this formulation, the coefficients of the quadratic and linear factors of the closed-loop characteristic polynomial are the variables. To solve the system of equalities and inequalities, a continuous realization of the gradient projection method and a barrier method are used under the homotopy framework. Our method is illustrated with an example for each class of control structure constraint.

Electrical Contact Resistance in Thin (<= 0.5 mu m) Gold Plated Contacts: Effect of Gold Plating Thickness

This paper describes the electrical contact resistance (ECR) measurements made on thin gold plated (gold plating of <= 0.5 mu m with a Ni underlayer of similar to 2 mu m) oxygen free high conductivity (OFHC) Cu contacts in vacuum environment. ECR in gold plated OFHC Cu contacts is found to be slightly higher than that in bare OFHC Cu contacts. Even though gold is a softer material than copper, the relatively high ECR values observed in gold plated contacts are mainly due to the higher hardness and electrical resistivity of the underlying Ni layer. It is well known that ECR is directly related to plating factor, which increases with increasing coating thickness when the electrical resistivity of coating material is more than that of substrate. Surprisingly, in the present case it is found that the ECR decreases with increasing gold layer thickness on OFHC Cu substrate (gold has higher electrical resistivity than OFHC Cu). It is analytically demonstrated from the topography and microhardness measurements results that this peculiar behavior is associated with thin gold platings, where the changes in surface roughness and microhardness with increasing layer thickness overshadow the effect of plating factor on ECR.

Photo-Defined Electrically Assisted Etching Method for Metal Stencil Fabrication

Metal stencils are well known in electronics printing application such as for dispensing solder paste for surface mounting, printing embedded passive elements in multilayer structures, etc. For microprinting applications using stencils, the print quality depends on the smoothness of the stencil aperture and its dimensional accuracy, which in turn are invariably related to the method used to manufacture the stencils. In this paper, fabrication of metal stencils using a photo-defined electrically assisted etching method is described. Apertures in the stencil were made in neutral electrolyte using three different types of impressed current, namely, dc, pulsed dc, and periodic pulse reverse (PPR). Dimensional accuracy and wall smoothness of the etched apertures in each of the current waveforms were compared. Finally, paste transfer efficiency of the stencil obtained using PPR was calculated and compared with those of a laser-cut electropolished stencil. It is observed that the stencil fabricated using current in PPR waveform has better dimensional accuracy and aperture wall smoothness than those obtained with dc and pulsed dc. From the paste transfer efficiency experiment, it is concluded that photo-defined electrically assisted etching method can provide an alternate route for fabrication of metal stencils for future microelectronics printing applications.

Decentralized control of linear multivariable systems

A strongly connected decentralized control system may be made single channel controllable and observable with respect to any channel by decentralized feedbacks. It is noted here that the system example considered by Corfmat and Morse to illustrate this fact is already single channel controllable and observable, with respect to one of the channels. An alternate example which fits into the situation is presented in this item.

Register File Energy Optimization for Snooping Based Clustered VLIW Architectures

Frequent accesses to the register file make it one of the major sources of energy consumption in ILP architectures. The large number of functional units connected to a large unified register file in VLIW architectures make power dissipation in the register file even worse because of the need for a large number of ports. High power dissipation in a relatively smaller area occupied by a register file leads to a high power density in the register file and makes it one of the prime hot-spots. This makes it highly susceptible to the possibility of a catastrophic heatstroke. This in turn impacts the performance and cost because of the need for periodic cool down and sophisticated packaging and cooling techniques respectively. Clustered VLIW architectures partition the register file among clusters of functional units and reduce the number of ports required thereby reducing the power dissipation. However, we observe that the aggregate accesses to register files in clustered VLIW architectures (and associated energy consumption) become very high compared to the centralized VLIW architectures and this can be attributed to a large number of explicit inter-cluster communications. Snooping based clustered VLIW architectures provide very limited but very fast way of inter-cluster communication by allowing some of the functional units to directly read some of the operands from the register file of some of the other clusters. In this paper, we propose instruction scheduling algorithms that exploit the limited snooping capability to reduce the register file energy consumption on an average by 12% and 18% and improve the overall performance by 5% and 11% for a 2-clustered and a 4-clustered machine respectively, over an earlier state-of-the-art clustered scheduling algorithm when evaluated in the context of snooping based clustered VLIW architectures.

Recent Advances in Low CTE and High Density System-on-a-Package (SOP) Substrate with Thin Film Component Integration

The Packaging Research Center has been developing next generation system-on-a-package (SOP) technology with digital, RF, optical, and sensor functions integrated in a single package/module. The goal of this effort is to develop a platform substrate technology providing very high wiring density and embedded thin film passive and active components using PWB compatible materials and processes. The latest SOP baseline process test vehicle has been fabricated on novel Si-matched CTE, high modulus C-SiC composite core substrates using 10mum thick BCB dielectric films with loss tangent of 0.0008 and dielectric constant of 2.65. A semi-additive plating process has been developed for multilayer microvia build-up using BCB without the use of any vacuum deposition or polishing/CMP processes. PWB and package substrate compatible processes such as plasma surface treatment/desmear and electroless/electrolytic pulse reverse plating was used. The smallest line width and space demonstrated in this paper is 6mum with microvia diameters in the 15-30mum range. This build-up process has also been developed on medium CTE organic laminates including MCL-E-679F from Hitachi Chemical and PTFE laminates with Cu-Invar-Cu core. Embedded decoupling capacitors with capacitance density of >500nF/cm2 have been integrated into the build-up layers using sol-gel synthesized BaTiO3 thin films (200-300nm film thickness) deposited on copper foils and integrated using vacuum lamination and subtractive etch processes. Thin metal alloy resistor films have been integrated into the SOP substrate using two methods: (a) NiCrAlSi thin films (25ohms per square) deposited on copper foils (Gould Electronics) laminated on the build-up layers and two step etch process for resistor definition, and (b) electroless plated Ni-W-P thin films (70 ohms to few Kohms per square) on the BCB dielectric by plasma surface treatment and activation. The electrical design and build-up layer structure along- - with key materials and processes used in the fabrication of the SOP4 test vehicle were presented in this paper. Initial results from the high density wiring and embedded thin film components were also presented. The focus of this paper is on integration of materials, processes and structures in a single package substrate for system-on-a-package (SOP) implementation

Thermal Management of Electronics Using PCM-Based Heat Sink Subjected to Cyclic Heat Load

Designing a heat sink based on a phase change material (PCM) under cyclic loading is a critical issue. For cyclic operation, it is required that the fraction of the PCM melting during the heating cycle should completely resolidify during the cooling period, so that that thermal storage unit can be operated for an unlimited number of cycles. Accordingly, studies are carried out to find the parameters influencing the behavior of a PCM under cyclic loading. A number of parameters are identified in the process, the most important ones being the duty cycle and heat transfer coefficient (h) for cooling. The required h or the required cooling period for complete resolidification for infinite cyclic operation of a conventional PCM-based heat sink is found to be very high and unrealistic with air cooling from the surface. To overcome this problem, the conventional design is modified where h and the area exposed to heat transfer can be independently controlled. With this arrangement, the enhanced area provided for cooling keeps h within realistic limits. Analytical investigation is carried out to evaluate the thermal performance of this modified PCM-based heat sink in comparison to those with conventional designs. Experiments are also performed on both the conventional and the modified PCM-based heat sinks to validate the new findings.