Compiler-Directed Dynamic Voltage Scaling using Program Phases

Energy consumption has become a major constraint in providing increased functionality for devices with small form factors. Dynamic voltage and frequency scaling has been identified as an effective approach for reducing the energy consumption of embedded systems. Earlier works on dynamic voltage scaling focused mainly on performing voltage scaling when the CPU is waiting for memory subsystem or concentrated chiefly on loop nests and/or subroutine calls having sufficient number of dynamic instructions. This paper concentrates on coarser program regions and for the first time uses program phase behavior for performing dynamic voltage scaling. Program phases are annotated at compile time with mode switch instructions. Further, we relate the Dynamic Voltage Scaling Problem to the Multiple Choice Knapsack Problem, and use well known heuristics to solve it efficiently. Also, we develop a simple integer linear program formulation for this problem. Experimental evaluation on a set of media applications reveal that our heuristic method obtains a 38% reduction in energy consumption on an average, with a performance degradation of 1% and upto 45% reduction in energy with a performance degradation of 5%. Further, the energy consumed by the heuristic solution is within 1% of the optimal solution obtained from the ILP approach.

A new family of soft transition converters: Design and dynamic model

The soft switching converters evolved through the resonant load, resonant switch, resonant transition and active clamp converters to eliminate switching losses in power converters. This paper briefly presents the operating principle of the new family of soft transition converters; the methodology of design of these converters is presented through an example. In the proposed family of converters, the switching transitions of both the main switch and auxiliary switch are lossless. When these converters are analysed in terms of the pole current and throw voltage, the defining equations of all converters belonging to this family become identical.Such a description allows one to define simple circuit oriented model for these converters. These circuit models help in evaluating the steady state and dynamic model of these converters. The standard dynamic performance functions of the converters are readily obtainable from this model. This paper presents these dynamic models and verifies the same through measurements on a prototype converter.

Command Tracking in High Performance Aircrafts: A New Dynamic Inversion Design

This paper proposes a new straight forward technique based on dynamic inversion, which is applied for tracking the pilot commands in high performance aircrafts.Pilot commands assumed in longitudinal mode are normal acceleration and total velocity(while roll angle and lateral acceleration are maintained at zero). In lateral mode, roll rate and total velocity are used as pilot commands (while climb rate and lateral acceleration are maintained at zero). Ensuring zero lateral acceleration leads to a better turn co-ordination. A six degree-of-freedom model of F-16 aircraft is used for both control design as well as simulation studies. Promising results are obtained which are found to be superior as compared to an existing approach (which is also based on dynamic inversion). The new approach has two potential benefits, namely reduced oscillatory response and reduced control magnitude. Another advantage of this approach is that it leads to a significant reduction of tuning parameters in the control design process.

Active Vibration Suppression of One-dimensional Nonlinear Structures Using Optimal Dynamic Inversion

A flexible robot arm can be modeled as an Euler-Bernoulli beam which are infinite degrees of freedom (DOF) system. Proper control is needed to track the desired motion of a robotic arm. The infinite number of DOF of beams are reduced to finite number for controller implementation, which brings in error (due to their distributed nature). Therefore, to represent reality better distributed parameter systems (DPS) should be controlled using the systems partial differential equation (PDE) directly. In this paper, we propose to use a recently developed optimal dynamic inversion technique to design a controller to suppress nonlinear vibration of a beam. The method used in this paper determines control forces directly from the PDE model of the system. The formulation has better practical significance, because it leads to a closed form solution of the controller (hence avoids computational issues).

Experimental evidence for interplay of dynamic heterogeneity and finite-size effect in glassy polymers

Despite two decades of extensive research, direct experimental evidence of a dynamical length scale determining the glass transition of confined polymers has yet to emerge. Using a recently established experimental technique of interface micro-rheology we provide evidence of finite-size effect truncating the growth of a quantity proportional to a dynamical length scale in confined glassy polymers, on cooling towards the glass transition temperature. We show how the interplay of variation of polymer film thickness and this temperature-dependent growing dynamical length scale determines the glass transition temperature, which in our case of 2-3nm thick films, is reduced significantly as compared to their bulk values.

An algorithm for dynamic optimal bandwidth allocation in communication networks

We study the problem of optimal bandwidth allocation in communication networks. We consider a queueing model with two queues to which traffic from different competing flows arrive. The queue length at the buffers is observed every T instants of time, on the basis of which a decision on the amount of bandwidth to be allocated to each buffer for the next T instants is made. We consider a class of closed-loop feedback policies for the system and use a twotimescale simultaneous perturbation stochastic approximation(SPSA) algorithm to find an optimal policy within the prescribed class. We study the performance of the proposed algorithm on a numerical setting. Our algorithm is found to exhibit good performance.

Dynamic and thermodynamic anomalies of water at low temperatures: from bulk water to reverse micelles and DNA hydration layer

Liquid water is known to exhibit remarkable thermodynamic and dynamic anomalies, ranging from solvation properties in supercritical state to an apparent divergence of the linear response functions at a low temperature. Anomalies in various dynamic properties of water have also been observed in the hydration layer of proteins, DNA grooves and inside the nanocavity, such as reverse micelles and nanotubes. Here we report studies on the molecular origin of these anomalies in supercooled water, in the grooves of DNA double helix and reverse micelles. The anomalies have been discussed in terms of growing correlation length and intermittent population fluctuation of 4- and 5-coordinated species. We establish correlation between thermodynamic response functions and mean squared species number fluctuation. Lifetime analysis of 4- and 5-coordinated species reveals interesting differences between the role of the two species in supercooled and constrained water. The nature and manifestations of the apparent and much discussed liquid-liquid transition under confinement are found to be markedly different from that in the bulk. We find an interesting `faster than bulk' relaxation in reverse micelles which we attribute to frustration effects created by competition between the correlations imposed by surface interactions and that imposed by hydrogen bond network of water.

Dynamic Multiscaling in Two-Dimensional Fluid Turbulence

We obtain, by extensive direct numerical simulations, time-dependent and equal-time structure functions for the vorticity, in both quasi-Lagrangian and Eulerian frames, for the direct-cascade regime in two-dimensional fluid turbulence with air-drag-induced friction. We show that different ways of extracting time scales from these time-dependent structure functions lead to different dynamic-multiscaling exponents, which are related to equal-time multiscaling exponents by different classes of bridge relations; for a representative value of the friction we verify that, given our error bars, these bridge relations hold.

Improving Superscalar Instruction Dispatch And Issue By Exploiting Dynamic Code Sequences

Superscalar processors currently have the potential to fetch multiple basic blocks per cycle by employing one of several recently proposed instruction fetch mechanisms. However, this increased fetch bandwidth cannot be exploited unless pipeline stages further downstream correspondingly improve. In particular,register renaming a large number of instructions per cycle is diDcult. A large instruction window, needed to receive multiple basic blocks per cycle, will slow down dependence resolution and instruction issue. This paper addresses these and related issues by proposing (i) partitioning of the instruction window into multiple blocks, each holding a dynamic code sequence; (ii) logical partitioning of the registerjle into a global file and several local jles, the latter holding registers local to a dynamic code sequence; (iii) the dynamic recording and reuse of register renaming information for registers local to a dynamic code sequence. Performance studies show these mechanisms improve performance over traditional superscalar processors by factors ranging from 1.5 to a little over 3 for the SPEC Integer programs. Next, it is observed that several of the loops in the benchmarks display vector-like behavior during execution, even if the static loop bodies are likely complex for compile-time vectorization. A dynamic loop vectorization mechanism that builds on top of the above mechanisms is briefly outlined. The mechanism vectorizes up to 60% of the dynamic instructions for some programs, albeit the average number of iterations per loop is quite small.

Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor

A generalized power tracking algorithm that minimizes power consumption of digital circuits by dynamic control of supply voltage and the body bias is proposed. A direct power monitoring scheme is proposed that does not need any replica and hence can sense total power consumed by load circuit across process, voltage, and temperature corners. Design details and performance of power monitor and tracking algorithm are examined by a simulation framework developed using UMC 90-nm CMOS triple well process. The proposed algorithm with direct power monitor achieves a power savings of 42.2% for activity of 0.02 and 22.4% for activity of 0.04. Experimental results from test chip fabricated in AMS 350 nm process shows power savings of 46.3% and 65% for load circuit operating in super threshold and near sub-threshold region, respectively. Measured resolution of power monitor is around 0.25 mV and it has a power overhead of 2.2% of die power. Issues with loop convergence and design tradeoff for power monitor are also discussed in this paper.