Room-temperature bandlike transport and Hall effect in a high-mobility ambipolar polymer

The advent of a new class of high-mobility semiconducting polymers opens up a window to address fundamental issues in electrical transport mechanism such as transport between localized states versus extended state conduction. Here, we investigate the origin of the ultralow degree of disorder (E-a similar to 16 meV) and the ``bandlike'' negative temperature (T) coefficient of the field effect electron mobility: mu(e)(FET) (T) in a high performance (mu(e)(FET) > 2.5 cm(2) V-1 s(-1)) diketopyrrolopyrrole based semiconducting polymer. Models based on the framework of mobility edge with exponential density of states are invoked to explain the trends in transport. The temperature window over which the system demonstrates delocalized transport was tuned by a systematic introduction of disorder at the transport interface. Additionally, the Hall mobility (mu(e)(Hall)) extracted from Hall voltage measurements in these devices was found to be comparable to field effect mobility (mu(e)(FET)) in the high T bandlike regime. Comprehensive studies with different combinations of dielectrics and semiconductors demonstrate the effectiveness of rationale molecular design, which emphasizes uniform-energetic landscape and low reorganization energy.

Experimental Investigation on Switching Characteristics of High-Current Insulated Gate Bipolar Transistors at Low Currents

Insulated gate bipolar transistors (IGBTs) are used in high-power voltage-source converters rated up to hundreds of kilowatts or even a few megawatts. Knowledge of device switching characteristics is required for reliable design and operation of the converters. Switching characteristics are studied widely at high current levels, and corresponding data are available in datasheets. But the devices in a converter also switch low currents close to the zero crossings of the line currents. Further, the switching behaviour under these conditions could significantly influence the output waveform quality including zero crossover distortion. Hence, the switching characteristics of high-current IGBTs (300-A and 75-A IGBT modules) at low load current magnitudes are investigated experimentally in this paper. The collector current, gate-emitter voltage and collector-emitter voltage are measured at various low values of current (less than 10% of the device rated current). A specially designed in-house constructed coaxial current transformer (CCT) is used for device current measurement without increasing the loop inductance in the power circuit. Experimental results show that the device voltage rise time increases significantly during turn-off transitions at low currents.

High-Performance Stacked TiO2-ZrO2 and Si-doped ZrO2 Metal-Insulator-Metal Capacitors

Metal-insulator-metal (MIM) capacitors for DRAM applications have been realised using stacked TiO2-ZrO2 (TiO2/ZrO2 and ZrO2/TiO2) and Si-doped ZrO2 (TiO2/Si-doped ZrO2) dielectrics. High capacitance densities (> 42 fF/mu m(2)), low leakage current densities (< 5 x 10(-7) A/cm(2) at -1 V), and sub-nm EOT (< 0.8 nm) have been achieved. The effects of constant voltage stress on the device characteristics is studied. The structural analysis of the samples is performed by X-ray diffraction measurements, and this is correlated to the electrical characteristics of the devices. The surface chemical states of the films are analyzed through X-ray photoelectron spectroscopy measurements. The doped-dielectric stack (TiO2/Si-doped ZrO2) helps to reduce leakage current density and improve reliability, with a marginal reduction in capacitance density; compared to their undoped counterparts (TiO2/ZrO2 and ZrO2/TiO2). We compare the device performance of the fabricated capacitors with other stacked high-k MIM capacitors reported in recent literature.

High performance sol-gel spin-coated titanium dioxide dielectric based MOS structures

High-kappa TiO2 thin films have been fabricated using cost effective sol-gel and spin-coating technique on p-Si (100) wafer. Plasma activation process was used for better adhesion between TiO2 films and Si. The influence of annealing temperature on the structure-electrical properties of titania films were investigated in detail. Both XRD and Raman studies indicate that the anatase phase crystallizes at 400 degrees C, retaining its structural integrity up to 1000 degrees C. The thickness of the deposited films did not vary significantly with the annealing temperature, although the refractive index and the RMS roughness enhanced considerably, accompanied by a decrease in porosity. For electrical measurements, the films were integrated in metal-oxide-semiconductor (MOS) structure. The electrical measurements evoke a temperature dependent dielectric constant with low leakage current density. The Capacitance-voltage (C-V) characteristics of the films annealed at 400 degrees C exhibited a high value of dielectric constant (similar to 34). Further, frequency dependent C-V measurements showed a huge dispersion in accumulation capacitance due to the presence of TiO2/Si interface states and dielectric polarization, was found to follow power law dependence on frequency (with exponent `s'=0.85). A low leakage current density of 3.6 x 10(-7) A/cm(2) at 1 V was observed for the films annealed at 600 degrees C. The results of structure-electrical properties suggest that the deposition of titania by wet chemical method is more attractive and cost-effective for production of high-kappa materials compared to other advanced deposition techniques such as sputtering, MBE, MOCVD and AID. The results also suggest that the high value of dielectric constant kappa obtained at low processing temperature expands its scope as a potential dielectric layer in MOS device technology. (C) 2015 Elsevier Ltd. All rights reserved.

DLTS analysis of amphoteric interface defects in high-TiO2 MOS structures prepared by sol-gel spin-coating

High-kappa TiO2 thin films have been fabricated from a facile, combined sol-gel spin - coating technique on p and n type silicon substrate. XRD and Raman studies headed the existence of anatase phase of TiO2 with a small grain size of 18 nm. The refractive index `n' quantified from ellipsometry is 2.41. AFM studies suggest a high quality, pore free films with a fairly small surface roughness of 6 angstrom. The presence of Ti in its tetravalent state is confirmed by XPS analysis. The defect parameters observed at the interface of Si/TiO2 were studied by capacitance - voltage (C - V) and deep level transient spectroscopy (DLTS). The flat - band voltage (V-FB) and the density of slow interface states estimated are -0.9, -0.44 V and 5.24x10(10), 1.03x10(11) cm(-2); for the NMOS and PMOS capacitors, respectively. The activation energies, interface state densities and capture cross -sections measured by DLTS are E-V + 0.30, E-C - 0.21 eV; 8.73x10(11), 6.41x10(11) eV(-1) cm(-2) and 5.8x10(-23), 8.11x10(-23) cm(2) for the NMOS and PMOS structures, respectively. A low value of interface state density in both P-and N-MOS structures makes it a suitable alternate dielectric layer for CMOS applications. And also very low value of capture cross section for both the carriers due to the amphoteric nature of defect indicates that the traps are not aggressive recombination centers and possibly can not contribute to the device operation to a large extent. (C) 2015 Author(s).

High-kappa TiO2 Thin Film Prepared by Sol-Gel Spin-Coating Method

High-k TiO2 thin film on p-type silicon substrate was fabricated by a combined sol-gel and spin coating method. Thus deposited titania film had anatase phase with a small grain size of 16 nm and surface roughness of congruent to 0.6 nm. The oxide capacitance (C-ox), flat band capacitance (C-FB), flat band voltage (V-FB), oxide trapped charge (Q(ot)), calculated from the high frequency (1 MHz) C-V curve were 0.47 nF, 0.16 nF, -0.91 V, 4.7x10(-12) C, respectively. As compared to the previous reports, a high dielectric constant of 94 at 1 MHz frequency was observed in the devices investigated here and an equivalent oxide thickness (EOT) was 4.1 nm. Dispersion in accumulation capacitance shows a linear relationship with AC frequencies. Leakage current density was found in acceptable limits (2.1e-5 A/cm(2) for -1 V and 5.7e-7 A/cm(2) for +1 V) for CMOS applications.

High-kappa TiO2 Thin Film Prepared by Sol-Gel Spin-Coating Method

High-k TiO2 thin film on p-type silicon substrate was fabricated by a combined sol-gel and spin coating method. Thus deposited titania film had anatase phase with a small grain size of 16 nm and surface roughness of congruent to 0.6 nm. The oxide capacitance (C-ox), flat band capacitance (C-FB), flat band voltage (V-FB), oxide trapped charge (Q(ot)), calculated from the high frequency (1 MHz) C-V curve were 0.47 nF, 0.16 nF, -0.91 V, 4.7x10(-12) C, respectively. As compared to the previous reports, a high dielectric constant of 94 at 1 MHz frequency was observed in the devices investigated here and an equivalent oxide thickness (EOT) was 4.1 nm. Dispersion in accumulation capacitance shows a linear relationship with AC frequencies. Leakage current density was found in acceptable limits (2.1e-5 A/cm(2) for -1 V and 5.7e-7 A/cm(2) for +1 V) for CMOS applications.

Dielectric investigation of high-k yttrium copper titanate thin films

We report on the first dielectric investigation of high-k yttrium copper titanate thin films, which were demonstrated to be very promising for nanoelectronics applications. The dielectric constant of these films is found to vary from 100 down to 24 (at 100 kHz) as a function of deposition conditions, namely oxygen pressure and film thickness. The physical origin of such variation was investigated in the framework of universal dielectric response and Cole-Cole relations and by means of voltage dependence studies of the dielectric constant. Surface-related effects and charge hopping polarization processes, strictly dependent on the film microstructure, are suggested to be mainly responsible for the observed dielectric response. In particular, the bulky behaviour of thick films deposited at lower oxygen pressure evolves towards a more complex and electrically heterogeneous structure when either the thickness decreases down to 50 nm or the films are grown under high oxygen pressure.

Dielectric investigation of high-k yttrium copper titanate thin films

We report on the first dielectric investigation of high-k yttrium copper titanate thin films, which were demonstrated to be very promising for nanoelectronics applications. The dielectric constant of these films is found to vary from 100 down to 24 (at 100 kHz) as a function of deposition conditions, namely oxygen pressure and film thickness. The physical origin of such variation was investigated in the framework of universal dielectric response and Cole-Cole relations and by means of voltage dependence studies of the dielectric constant. Surface-related effects and charge hopping polarization processes, strictly dependent on the film microstructure, are suggested to be mainly responsible for the observed dielectric response. In particular, the bulky behaviour of thick films deposited at lower oxygen pressure evolves towards a more complex and electrically heterogeneous structure when either the thickness decreases down to 50 nm or the films are grown under high oxygen pressure.

Low temperature solution processed high-kappa ZrO2 gate dielectrics for nanoelectonics

The high-kappa gate dielectrics, specifically amorphous films offer salient features such as exceptional mechanical flexibility, smooth surfaces and better uniformity associated with low leakage current density. In this work, similar to 35 nm thick amorphous ZrO2 films were deposited on silicon substrate at low temperature (300 degrees C, 1 h) from facile spin-coating method and characterized by various analytical techniques. The X-ray diffraction and X-ray photoelectron spectroscopy reveal the formation of amorphous phase ZrO2, while ellipsometry analysis together with the Atomic Force Microscope suggest the formation of dense film with surface roughness of 1.5 angstrom, respectively. The fabricated films were integrated in metal-oxide-semiconductor (MOS) structures to check the electrical capabilities. The oxide capacitance (C-ox), flat band capacitance (C-FB), flat band voltage (V-FB), dielectric constant (kappa) and oxide trapped charges (Q(ot)) extracted from high frequency (1 MHz) C-V curve are 186 pF, 104 pF, 0.37V, 15 and 2 x 10(-11) C, respectively. The small flat band voltage 0.37V, narrow hysteresis and very little frequency dispersion between 10 kHz-1 MHz suggest an excellent a-ZrO2/Si interface with very less trapped charges in the oxide. The films exhibit a low leakage current density 4.7 x 10(-9)A/cm(2) at 1V. In addition, the charge transport mechanism across the MOSC is analyzed and found to have a strong bias dependence. The space charge limited conduction mechanism is dominant in the high electric field region (1.3-5 V) due to the presence of traps, while the trap-supported tunneling is prevailed in the intermediate region (0.35-1.3 V). Low temperature solution processed ZrO2 thin films obtained are of high quality and find their importance as a potential dielectric layer on Si and polymer based flexible electronics. (C) 2016 Published by Elsevier B.V.

Critical investigation of high performance spin-coated high-kappa titania thin films based MOS capacitor

We report the tunable dielectric constant of titania films with low leakage current density. Titanium dioxide (TiO2) films of three different thicknesses (36, 63 and 91 nm) were deposited by the consecutive steps of solution preparation, spin-coating, drying, and firing at different temperatures. The problem of poor adhesion between Si substrate and TiO2 insulating layer was resolved by using the plasma activation process. The surface roughness was found to increase with increasing thickness and annealing temperature. The electrical investigation was carried out using metal-oxide-semiconductor structure. The flat band voltage (V-FB), oxide trapped charge (Q(ot)), dielectric constant (kappa) and equivalent oxide thicknesses are calculated from capacitance-voltage (C-V) curves. The C-V characteristics indicate a thickness dependent dielectric constant. The dielectric constant increases from 31 to 78 as thickness increases from 36 to 91 nm. In addition to that the dielectric constant was found to be annealing temperature and frequency dependent. The films having thickness 91 nm and annealed at 600 A degrees C shows the low leakage current density. Our study provides a broad insight of the processing parameters towards the use of titania as high-kappa insulating layer, which might be useful in Si and polymer based flexible devices.