272 resultados para realistic neural modeling
Resumo:
With the emergence of voltage scaling as one of the most powerful power reduction techniques, it has been important to support voltage scalable statistical static timing analysis (SSTA) in deep submicrometer process nodes. In this paper, we propose a single delay model of logic gate using neural network which comprehensively captures process, voltage, and temperature variation along with input slew and output load. The number of simulation programs with integrated circuit emphasis (SPICE) required to create this model over a large voltage and temperature range is found to be modest and 4x less than that required for a conventional table-based approach with comparable accuracy. We show how the model can be used to derive sensitivities required for linear SSTA for an arbitrary voltage and temperature. Our experimentation on ISCAS 85 benchmarks across a voltage range of 0.9-1.1V shows that the average error in mean delay is less than 1.08% and average error in standard deviation is less than 2.85%. The errors in predicting the 99% and 1% probability point are 1.31% and 1%, respectively, with respect to SPICE. The two potential applications of voltage-aware SSTA have been presented, i.e., one for improving the accuracy of timing analysis by considering instance-specific voltage drops in power grids and the other for determining optimum supply voltage for target yield for dynamic voltage scaling applications.
Resumo:
In this paper, we present a novel formulation for performing topology optimization of electrostatically actuated constrained elastic structures. We propose a new electrostatic-elastic formulation that uses the leaky capacitor model and material interpolation to define the material state at every point of a given design domain continuously between conductor and void states. The new formulation accurately captures the physical behavior when the material in between a conductor and a void is present during the iterative process of topology optimization. The method then uses the optimality criteria method to solve the optimization problem by iteratively pushing the state of the domain towards that of a conductor or a void in the appropriate regions. We present examples to illustrate the ability of the method in creating the stiffest structure under electrostatic force for different boundary conditions.
Resumo:
This paper deals with reducing the waiting times of vehicles at the traffic junctions by synchronizing the traffic signals. Strategies are suggested for betterment of the situation at different time intervals of the day, thus ensuring smooth flow of traffic. The concept of single way systems are also analyzed. The situation is simulated in Witness 2003 Simulation package using various conventions. The average waiting times are reduced by providing an optimal combination for the traffic signal timer. Different signal times are provided for different times of the day, thereby further reducing the average waiting times at specific junctions/roads according to the experienced demands.
Resumo:
Modeling the performance behavior of parallel applications to predict the execution times of the applications for larger problem sizes and number of processors has been an active area of research for several years. The existing curve fitting strategies for performance modeling utilize data from experiments that are conducted under uniform loading conditions. Hence the accuracy of these models degrade when the load conditions on the machines and network change. In this paper, we analyze a curve fitting model that attempts to predict execution times for any load conditions that may exist on the systems during application execution. Based on the experiments conducted with the model for a parallel eigenvalue problem, we propose a multi-dimensional curve-fitting model based on rational polynomials for performance predictions of parallel applications in non-dedicated environments. We used the rational polynomial based model to predict execution times for 2 other parallel applications on systems with large load dynamics. In all the cases, the model gave good predictions of execution times with average percentage prediction errors of less than 20%
Resumo:
The oxygen content of liquid Ni-Mn alloy equilibrated with spinel solid solution, (Ni,Mn)O. (1 +x)A12O3, and α-Al2O3 has been measured by suction sampling and inert gas fusion analysis. The corresponding oxygen potential of the three-phase system has been determined with a solid state cell incorporating (Y2O3)ThO2 as the solid electrolyte and Cr + Cr2O3 as the reference electrode. The equilibrium composition of the spinel phase formed at the interface of the alloy and alumina crucible was obtained using EPMA. The experimental data are compared with a thermodynamic model based on the free energies of formation of end-member spinels, free energy of solution of oxygen in liquid nickel, interaction parameters, and the activities in liquid Ni-Mn alloy and spinel solid solution. Mixing properties of the spinel solid solution are derived from a cation distribution model. The computational results agree with the experimental data on oxygen concentration, potential, and composition of the spinel phase.
Resumo:
A general differential equation for the propagation of sound in a variable area duct or nozzle carrying incompressible mean flow (of low Mach number) is derived and solved for hyperbolic and parabolic shapes. Expressions for the state variables of acoustic pressure and acoustic mass velocity of the shapes are derived. Self‐consistent expressions for the four‐pole parameters are developed. The conical, exponential, catenoidal, sine, and cosine ducts are shown to be special cases of hyperbolic ducts. Finally, it is shown that if the mean flow in computing the transmission loss of the mufflers involving hyperbolic and parabolic shapes was not neglected, little practical benefit would be derived.
Resumo:
A novel methodology for modeling the effects of process variations on circuit delay performance is proposed by relating the variations in process parameters to variations in delay metric of a complex digital circuit. The delay of a 2-input NAND gate with 65nm gate length transistors is extensively characterized by mixed-mode simulations which is then used as a library element. The variation in saturation current Ionat the device level, and the variation in rising/falling edge stage delay for the NAND gate at the circuit level, are taken as performance metrics. A 4-bit x 4-bit Wallace tree multiplier circuit is used as a representative combinational circuit to demonstrate the proposed methodology. The variation in the multiplier delay is characterized, to obtain delay distributions, by an extensive Monte Carlo analysis. An analytical model based on CV/I metric is proposed, to extend this methodology for a generic technology library with a variety of library elements.
Resumo:
A numerical micro-scale model is developed to study the behavior of dendrite growth in presence of melt convection. In this method, an explicit, coupled enthalpy model is used to simulate the growth of an equiaxed dendrite, while a Volume of Fluid (VOF) method is used to track the movement of the dendrite in the convecting melt in a two-dimensional Eulerian framework. Numerical results demonstrate the effectiveness of the enthalpy model in simulating the dendritic growth involving complex shape, and the accuracy of VOF method in conserving mass and preserving the complex dendritic shape during motion. Simulations are performed in presence of uniform melt flow for both fixed and moving dendrites, and the difference in dendrite morphology is shown.
Resumo:
Chronic recording of neural signals is indispensable in designing efficient brain–machine interfaces and to elucidate human neurophysiology. The advent of multichannel micro-electrode arrays has driven the need for electronics to record neural signals from many neurons. The dynamic range of the system can vary over time due to change in electrode–neuron distance and background noise. We propose a neural amplifier in UMC 130 nm, 1P8M complementary metal–oxide–semiconductor (CMOS) technology. It can be biased adaptively from 200 nA to 2 $mu{rm A}$, modulating input referred noise from 9.92 $mu{rm V}$ to 3.9 $mu{rm V}$. We also describe a low noise design technique which minimizes the noise contribution of the load circuitry. Optimum sizing of the input transistors minimizes the accentuation of the input referred noise of the amplifier and obviates the need of large input capacitance. The amplifier achieves a noise efficiency factor of 2.58. The amplifier can pass signal from 5 Hz to 7 kHz and the bandwidth of the amplifier can be tuned for rejecting low field potentials (LFP) and power line interference. The amplifier achieves a mid-band voltage gain of 37 dB. In vitro experiments are performed to validate the applicability of the neural low noise amplifier in neural recording systems.