Modified Stability Checking for On-Line Error Detection

The paper propose a unified error detection technique, based on stability checking, for on-line detection of delay, crosstalk and transient faults in combinational circuits and SEUs in sequential elements. The proposed method, called modified stability checking (MSC), overcomes the limitations of the earlier stability checking methods. The paper also proposed a novel checker circuit to realize this scheme. The checker is self-checking for a wide set of realistic internal faults including transient faults. Extensive circuit simulations have been done to characterize the checker circuit. A prototype checker circuit for a 1mm2 standard cell array has been implemented in a 0.13mum process.

INTACTE: An Interconnect Area, Delay, and Energy Estimation Tool for Microarchitectural Explorations

Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters. Hence these models are hard to use directly to make high level microarchitectural trade-offs in the initial exploration phase of a design. In this paper, we propose INTACTE, a tool that can be used by architects toget reasonably accurate interconnect area, delay, and power estimates based on a few architecture level parameters for the interconnect such as length, width (in number of bits), frequency, and latency for a specified technology and voltage. The tool uses well known models of interconnect delay and energy taking into account the wire pitch, repeater size, and spacing for a range of voltages and technologies.It then solves an optimization problem of finding the lowest energy interconnect design in terms of the low level circuit parameters, which meets the architectural constraintsgiven as inputs. In addition, the tool also provides the area, energy, and delay for a range of supply voltages and degrees of pipelining, which can be used for micro-architectural exploration of a chip. The delay and energy models used by the tool have been validated against low level circuit simulations. We discuss several potential applications of the tool and present an example of optimizing interconnect design in the context of clustered VLIW architectures. Copyright 2007 ACM.

A New Family of Soft Transition Converters: Design Example and Dynamic Model

The soft switching converters evolved through the resonant load, resonant switch, resonant transition and active clamp converters to eliminate switching losses in power converters. This paper briefly presents the operating principle of the new family of soft transition converters; the methodology of design of these converters is presented through an example. In the proposed family of converters, the switching transitions of both the main switch and auxiliary switch are lossless.When these converters are analysed in terms of the pole current and throw voltage, the defining equations of all converters belonging to this family become identical.Such a description allows one to define simple circuit oriented model for these converters. These circuit models help in evaluating the steady state and dynamic model of these converters. The standard dynamic performance functions of the converters are readily obtainable from this model. This paper presents these dynamic models and verifies the same through measurements on a prototype converter.

A new family of soft transition converters: Design and dynamic model

The soft switching converters evolved through the resonant load, resonant switch, resonant transition and active clamp converters to eliminate switching losses in power converters. This paper briefly presents the operating principle of the new family of soft transition converters; the methodology of design of these converters is presented through an example. In the proposed family of converters, the switching transitions of both the main switch and auxiliary switch are lossless. When these converters are analysed in terms of the pole current and throw voltage, the defining equations of all converters belonging to this family become identical.Such a description allows one to define simple circuit oriented model for these converters. These circuit models help in evaluating the steady state and dynamic model of these converters. The standard dynamic performance functions of the converters are readily obtainable from this model. This paper presents these dynamic models and verifies the same through measurements on a prototype converter.

Extrinsic Analog Synthesis using Piecewise Linear Current-Mode Circuits

A methodology is presented for the synthesis of analog circuits using piecewise linear (PWL) approximations. The function to be synthesized is divided into PWL segments such that each segment can be realized using elementary MOS current-mode programmable-gain circuits. A number of these elementary current-mode circuits when connected in parallel, it is possible to realize piecewise linear approximation of any arbitrary analog function with in the allowed approximation error bounds. Simulation results show a close agreement between the desired function and the synthesized output. The number of PWL segments used for approximation and hence the circuit area is determined by the required accuracy and the smoothness of the resulting function.

Dye sensitized solar cell based on platinum decorated multiwall carbon nanotubes as catalytic layer on the counter electrode

In this study we have employed multiwall carbon nanotubes (MWCNT), decorated with platinum as catalytic layer for the reduction of tri-iodide ions in dye sensitized solar cell (DSSC). MWCNTs have been prepared by a simple one step pyrolysis method using ferrocene as the catalyst and xylene as the carbon source. Platinum decorated MWCNTs have been prepared by chemical reduction method. The as prepared MWCNTs and Pt/MWCNTs have been characterized by X-ray diffraction (XRD), scanning electron microscopy (SEM) and transmission electron microscopy (TEM). In combination with a dye adsorbed TiO(2) photoanode and an organic liquid electrolyte, Pt/MWCNT composite showed an enhanced short circuit current density of 16.12 mA/cm(2) leading to a cell efficiency of 6.50% which is comparable to that of Platinum. (C) 2011 Elsevier Ltd. All rights reserved.

The phenomenon of notch in an NEMP simulator and its reduction

The effect of variation in the switching instant of the output switch of the pulser circuit used in energizing an NEMP simulator on the voltage fed to the simulator and hence the electric field within the working volume of the simulator has been studied. Depending upon the instant at which the output switch closes, the amplitude and the wave shape of the voltage that is fed to the illuminator varies. This wave shape of the output voltage from the pulser circuit determines the shape and characteristics of the electric field within the working volume of the simulator. To study the effect of variation in the switching instant on the vertical electric field within the working volume, the vertical electric field has been computed in time and frequency domains. For certain switching instants, the electric field shows a sharp reduction in its amplitude after the peak which is called the notch. The presence of notch results in the test object not getting illuminated with all the frequencies of interest. The notch has been successfully reduced by suitably modifying the pulser circuit.

Coupling of High Voltage AC Power Line Fields to Metallic Pipelines

In the recent years, there has been a trend to run metallic pipelines carrying petroleum products and high voltage AC power lines parallel to each other in a relatively narrow strip of land. Due to this sharing of the right-of-way, verhead AC power line electric field may induce voltages on the metallic pipelines running in close vicinity leading to serious adverse effects. In this paper, the induced voltages on metallic pipelines running in close vicinity of high voltage power transmission lines have been computed. Before computing the induced voltages, an optimum configuration of the phase conductors based on the lowest conductor surface gradient and field under transmission line has been arrived at. This paper reports the conductor surface field gradients calculated for the various configurations. Also the electric fields under transmission line, for single circuit and double circuit (various phase arrangements) have been analyzed. Based on the above results, an optimum configuration giving the lowest field under the power line as well as the lowest conductor surface gradient has been arrived at and for this configuration, induced voltage on the pipeline has been computed using the Charge Simulation Method (CSM). For comparison, induced voltages on the pipeline has been computed for the various other phase configurations also.

Voltage and Temperature-Aware SSTA Using Neural Network Delay Model

With the emergence of voltage scaling as one of the most powerful power reduction techniques, it has been important to support voltage scalable statistical static timing analysis (SSTA) in deep submicrometer process nodes. In this paper, we propose a single delay model of logic gate using neural network which comprehensively captures process, voltage, and temperature variation along with input slew and output load. The number of simulation programs with integrated circuit emphasis (SPICE) required to create this model over a large voltage and temperature range is found to be modest and 4x less than that required for a conventional table-based approach with comparable accuracy. We show how the model can be used to derive sensitivities required for linear SSTA for an arbitrary voltage and temperature. Our experimentation on ISCAS 85 benchmarks across a voltage range of 0.9-1.1V shows that the average error in mean delay is less than 1.08% and average error in standard deviation is less than 2.85%. The errors in predicting the 99% and 1% probability point are 1.31% and 1%, respectively, with respect to SPICE. The two potential applications of voltage-aware SSTA have been presented, i.e., one for improving the accuracy of timing analysis by considering instance-specific voltage drops in power grids and the other for determining optimum supply voltage for target yield for dynamic voltage scaling applications.

Sulphur potential measurements with a two phase sulphide oxide electrolyte

The open circuit potentials of the galvanic cell,Pt (or Au)¦(Ar + H2S + H2)primeparCaS + ZrO2(CaO)par (Ar + H2S+ H2)Prime£t (or Au) has been measured in the temperature range 1000 to 1660 K and PH2S:PH 2 ratios from 1.73×10–5 to 2.65×10–1. The solid electrolyte consists of a dispersion of calcium sulphide in a matrix of calcia-stabilized zirconia. The surface of the electrolyte is coated with a thin layer of calcium sulphide to prevent the formation of water vapour by reaction of hydrogen sulphide with calcium oxide or zirconia present in the electrolyte. The use of a lsquopoint electrodersquo with a catalytically active tip was necessary to obtain steady emfs. At low temperatures and high sulphur potentials the emfs agreed with the Nernst equation. Deviations were observed at high temperatures and low sulphur potentials, probably due to the onset of significant electronic conduction in the oxide matrix of the electrolyte. The values of oxygen and sulphur potentials at which the electronic conductivity is equal to ionic conductivity in the two-phase electrolyte have been evaluated from the emf response of the cell. The sulphide-oxide electrolyte is unsuitable for sulphur potential measurements in atmospheres with high oxygen potentials, where oxidation of calcium sulphide may be expected.

A low cost approach for the fabrication of microwave phase shifter on laminates

This paper presents a simple and low cost fabrication approach using extended printed circuit board processing techniques for an electrostatically actuated phase shifter on a common microwave laminate. This approach uses 15 mu m thin copper foils for realizing the bridge structures as well as for a spacer. A polymeric thin film deposited by spin coating and patterned using lithographic process is used as a dielectric layer to improve the reliability of the device. The prototype of the phase shifter for X-band operation is fabricated and tested for electrical and electromechanical performance parameters. The realized devices have a figure of merit of 70 degrees/dB for a maximum applied bias potential of 85 V. Since these phase shifters can be conveniently fabricated directly on microwave substrates used for feed distribution networks of phased arrays, the overall addition in cost, dimensions and processing for including these phase shifters in these arrays is minimal.

Low oxygen potential boundary for the stability of YBA2Cu3O7−δ

On lowering the oxygen potential, the tetragonal phase of YBa2Cu3O7−δ was found to decompose into a mixture of Y2BaCuO5, BaCuO2 and BaCu2O2 in the temperature range 773–1173 K. The 123 compound was contained in a closed crucible of yttria-stabilized zirconia in the temperature range 773–1073 K. Oxygen was removed in small increments by coulometric titration through the solid electrolyte crucible at constant temperature. The oxygen potential was calculated from the open circuit e.m.f. of the solid state cell after successive titrations. Pure oxygen at a pressure of 1.01 × 105 Pa was used as the reference electrode. The decomposition of the 123 compound manifested as a plateau in oxygen potential. The decomposition products were identified by X-ray diffraction. At temperatures above 1073 K there was some evidence of reaction between the 123 compound, solid electrolyte crucible and platinum. For measurements above 1073 K, the 123 compound was contained in a magnesia crucible placed in a closed outer silica tube. The oxygen potential in the gas phase above the 123 compound was controlled and measured by a solid state cell based on yttria-stabilized zirconia which served both as a pump and sensor. The lower oxygen potential limit for the stability of the 123 compound is given by View the MathML source The oxygen non-stoichiometric parameter δ for the 123 compound has a value of 0.98 (View the MathML source) at dissociation.

Production of niobium powder by electronically mediated reaction (EMR) using calcium as a reductant

Explored in this study is an electronically mediated reaction (EMR) route for the production of niobium powder using calcium as a reductant for niobium oxide (Nb2O5). Feed material, Nb2O5, and reductant calcium alloy containing aluminum and nickel were charged into electronically isolated locations in a molten salt (e.g. CaCl2) at 1173 K. The current flow through an external path between the feed and reductant locations was monitored. A current approximately 0.4 A was measured during the reaction in the external circuit connecting cathode and anode location. Niobium powder with low aluminum and nickel content was obtained although liquid Ca–Al–Ni alloy was used as the reductant. This clearly demonstrates that niobium metal powder can be produced by an electronically mediated reaction (EMR), without direct physical contact between feed (Nb2O5) and reductant (calcium). Mechanism of calciothermic reduction of Nb2O5 in the molten salt is discussed using an isothermal chemical potential diagram.

Authors reply to "On uniqueness, transfer and combination of acoustic sources in one-dimensional systems"

The use of electroacoustic analogies suggests that a source of acoustical energy (such as an engine, compressor, blower, turbine, loudspeaker, etc.) can be characterized by an acoustic source pressure ps and internal source impedance Zs, analogous to the open-circuit voltage and internal impedance of an electrical source. The present paper shows analytically that the source characteristics evaluated by means of the indirect methods are independent of the loads selected; that is, the evaluated values of ps and Zs are unique, and that the results of the different methods (including the direct method) are identical. In addition, general relations have been derived here for the transfer of source characteristics from one station to another station across one or more acoustical elements, and also for combining several sources into a single equivalent source. Finally, all the conclusions are extended to the case of a uniformly moving medium, incorporating the convective as well as dissipative effects of the mean flow.

Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor

A generalized power tracking algorithm that minimizes power consumption of digital circuits by dynamic control of supply voltage and the body bias is proposed. A direct power monitoring scheme is proposed that does not need any replica and hence can sense total power consumed by load circuit across process, voltage, and temperature corners. Design details and performance of power monitor and tracking algorithm are examined by a simulation framework developed using UMC 90-nm CMOS triple well process. The proposed algorithm with direct power monitor achieves a power savings of 42.2% for activity of 0.02 and 22.4% for activity of 0.04. Experimental results from test chip fabricated in AMS 350 nm process shows power savings of 46.3% and 65% for load circuit operating in super threshold and near sub-threshold region, respectively. Measured resolution of power monitor is around 0.25 mV and it has a power overhead of 2.2% of die power. Issues with loop convergence and design tradeoff for power monitor are also discussed in this paper.