Estimation of Parameters for Battery Storage Models

This paper presents a comprehensive and robust strategy for the estimation of battery model parameters from noise corrupted data. The deficiencies of the existing methods for parameter estimation are studied and the proposed parameter estimation strategy improves on earlier methods by working optimally for low as well as high discharge currents, providing accurate estimates even under high levels of noise, and with a wide range of initial values. Testing on different data sets confirms the performance of the proposed parameter estimation strategy.

Harmonic analysis of DC capacitor current in sinusoidal and space-vector modulated neutral-point-clamped inverters

The voltage ripple and power loss in the DC-capacitor of a voltage source inverter depend on the harmonic currents flowing through the capacitor. This paper presents a double Fourier series based analysis of the harmonic contents of the DC capacitor current in a three-level neutral-point clamped (NPC) inverter, modulated with sine-triangle pulse-width modulation (SPWM) or conventional space vector pulse-width modulation (CSVPWM) schemes. The analytical results are validated experimentally on a 3-kVA three-level inverter prototype. The capacitor current in an NPC inverter has a periodicity of 120(a similar to) at the fundamental or modulation frequency. Hence, this current contains third-harmonic and triplen-frequency components, apart from switching frequency components. The harmonic components vary with modulation index and power factor for both PWM schemes. The third harmonic current decreases with increase in modulation index and also decreases with increase in power factor in case of both PWM methods. In general, the third harmonic content is higher with SPWM than with CSVPWM at a given operating condition. Also, power loss and voltage ripple in the DC capacitor are estimated for both the schemes using the current harmonic spectrum and equivalent series resistance (ESR) of the capacitor.

Protection of Digital Telecom Exchanges Against Lightning Surges and Earth Faults

Low-power electronic devices used in digital telecom exchanges are vulnerable to surge voltages and currents primarily originating from natural lightning or due to the direct interactions between electric power and telecommunication lines, etc., causing the earth/ground potential rise, neutral potential rise, and faults in the system. The fault currents may flow directly to telecom lines or through the equipment to the customer's premises, causing adequate damage to the equipment and personnel safety. In wireline applications, analog or digital, central office, exchanges, and subscriber sides have to be protected. Decisive protection and protective methods have to be employed for proper functioning of the equipment under overvoltage/overcurrent conditions. Current investigation reports some interesting results obtained on the recently developed high-voltage high-current protection cards used in digital telecom exchanges. The performances of protection cards both for the ring wave and hybrid wave surges are evaluated and presented. The surge generators required for the investigation are developed and fabricated in house as per the relevant telecom standards.

Computationally efficient models for simulation of non-ideal DC-DC converters operating in continuous and discontinuous conduction modes

This paper discusses dynamic modeling of non-isolated DC-DC converters (buck, boost and buck-boost) under continuous and discontinuous modes of operation. Three types of models are presented for each converter, namely, switching model, average model and harmonic model. These models include significant non-idealities of the converters. The switching model gives the instantaneous currents and voltages of the converter. The average model provides the ripple-free currents and voltages, averaged over a switching cycle. The harmonic model gives the peak to peak values of ripple in currents and voltages. The validity of all these models is established by comparing the simulation results with the experimental results from laboratory prototypes, at different steady state and transient conditions. Simulation based on a combination of average and harmonic models is shown to provide all relevant information as obtained from the switching model, while consuming less computation time than the latter.

Optical-Phonon-Limited High-Field Transport in Layered Materials

An optical-phonon-limited velocity model has been employed to investigate high-field transport in a selection of layered 2-D materials for both, low-power logic switches with scaled supply voltages, and high-power, high-frequency transistors. Drain currents, effective electron velocities, and intrinsic cutoff frequencies as a function of carrier density have been predicted, thus providing a benchmark for the optical-phonon-limited high-field performance limits of these materials. The optical-phonon-limited carrier velocities for a selection of multi-layers of transition metal dichalcogenides and black phosphorus are found to be modest compared to their n-channel silicon counterparts, questioning the utility of biasing these devices in the source-injection dominated regime. h-BN, at the other end of the spectrum, is shown to be a very promising material for high-frequency, high-power devices, subject to the experimental realization of high carrier densities, primarily due to its large optical-phonon energy. Experimentally extracted saturation velocities from few-layer MoS2 devices show reasonable qualitative and quantitative agreement with the predicted values. The temperature dependence of the measured v(sat) is discussed and compared with the theoretically predicted dependence over a range of temperatures.

Numerical analysis of segmented-electrode Orbitraps

Simple geometries which are possible alternatives for the Orbitrap are studied in this paper. We have taken up for numerical investigation two segmented-electrode structures, ORB1 and ORB2, to mimic the electric field of the Orbitrap. In the ORB1, the inner spindle-like electrode and the outer barrel-like electrode of the Orbitrap have been replaced by 35 rings and 35 discs of fixed radii, respectively. In this structure two segmented end cap electrodes have been added. In this geometry, different potentials are applied to the different electrodes keeping top-bottom symmetry intact. In the second geometry, ORB2, the inner and outer electrodes of the Orbitrap were replaced by an approximate step structure which follows the profile of the Orbitrap electrodes. In the present study 45 steps have been used. In the ORB2, like the Orbitrap, the inner electrode is held at a negative potential and the outer electrode is at ground potential. For the purpose of comparing the performance of ORB1 and ORB2 with that of the Orbitrap, the following studies have been undertaken: (1) variation of electric potential, (2) computation of ion trajectories, (3) simulation of image currents. These studies have been carried out using both 2D and 3D Boundary Element Method (BEM), the 3D BEM was developed specifically for this study. It has been seen in these investigations that ORB1 and ORB2 have performance similar to that of the Orbitrap, with the performance of the ORB1 being seen to be marginally superior to that of the ORB2. It has been shown that with proper optimization, geometries containing far fewer electrodes can be used as mass analyzers. A novel technique of optimization of the electric field has been proposed with the objective of minimizing the dependence of axial frequency of ion motion on the initial position of an ion. The results on the optimization of 9 and 15 segmented-electrode traps having the same design as ORB1 show that it can provide accurate mass analysis. (C) 2015 Elsevier B.V. All rights reserved.

Numerical analysis of segmented-electrode Orbitraps

Simple geometries which are possible alternatives for the Orbitrap are studied in this paper. We have taken up for numerical investigation two segmented-electrode structures, ORB1 and ORB2, to mimic the electric field of the Orbitrap. In the ORB1, the inner spindle-like electrode and the outer barrel-like electrode of the Orbitrap have been replaced by 35 rings and 35 discs of fixed radii, respectively. In this structure two segmented end cap electrodes have been added. In this geometry, different potentials are applied to the different electrodes keeping top-bottom symmetry intact. In the second geometry, ORB2, the inner and outer electrodes of the Orbitrap were replaced by an approximate step structure which follows the profile of the Orbitrap electrodes. In the present study 45 steps have been used. In the ORB2, like the Orbitrap, the inner electrode is held at a negative potential and the outer electrode is at ground potential. For the purpose of comparing the performance of ORB1 and ORB2 with that of the Orbitrap, the following studies have been undertaken: (1) variation of electric potential, (2) computation of ion trajectories, (3) simulation of image currents. These studies have been carried out using both 2D and 3D Boundary Element Method (BEM), the 3D BEM was developed specifically for this study. It has been seen in these investigations that ORB1 and ORB2 have performance similar to that of the Orbitrap, with the performance of the ORB1 being seen to be marginally superior to that of the ORB2. It has been shown that with proper optimization, geometries containing far fewer electrodes can be used as mass analyzers. A novel technique of optimization of the electric field has been proposed with the objective of minimizing the dependence of axial frequency of ion motion on the initial position of an ion. The results on the optimization of 9 and 15 segmented-electrode traps having the same design as ORB1 show that it can provide accurate mass analysis. (C) 2015 Elsevier B.V. All rights reserved.

Fabrication and Nonlinear Thermomechanical Analysis of SU8 Thermal Actuator

SU8-based micromechanical structures are widely used as thermal actuators in the development of compliant micromanipulation tools. This paper reports the design, nonlinear thermomechanical analysis, fabrication, and thermal actuation of SU8 actuators. The thermomechanical analysis of the actuator incorporates nonlinear temperature-dependent properties of SU8 polymer to accurately model its thermal response during actuation. The designed SU8 thermal actuators are fabricated using surface micromachining techniques and the electrical interconnects are made to them using flip-chip bonding. The issues due to thermal stress during fabrication are discussed and a novel strategy is proposed to release the thermal stress in the fabricated actuators. Subsequent characterization of the actuator using an optical profilometer reveals excellent thermal response, good repeatability, and low hysteresis. The average deflection is similar to 8.5 mu m for an actuation current of similar to 5 mA. The experimentally obtained deflection profile and the tip deflection at different currents are both shown to be in good agreement with the predictions of the nonlinear thermomechanical model. This underscores the need to consider nonlinearities when modeling the response of SU8 thermal actuators. 2015-0087]

Timing Calculations for a General N-Level Dodecagonal Space Vector Structure Using Only Reference Phase Voltages

Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector (SV) structures have advantages like extension of linear modulation range, elimination of fifth and seventh harmonics in phase voltages and currents for the full modulation range including extreme 12-step operation, reduced device voltage ratings, lesser dv/dt stresses on devices and motor phase windings resulting in lower EMI/EMC problems, and lower switching frequency-making it more suitable for high-power drive applications. This paper proposes a simple method to obtain pulsewidth modulation (PWM) timings for a dodecagonal voltage SV structure using only sampled reference voltages. In addition to this, a carrier-based method for obtaining the PWM timings for a general N-level dodecagonal structure is proposed in this paper for the first time. The algorithm outputs the triangle information and the PWM timing values which can be set as the compare values for any carrier-based hardware PWM module to obtain SV PWM like switching sequences. The proposed method eliminates the need for angle estimation, computation of modulation indices, and iterative search algorithms that are typical in multilevel dodecagonal SV systems. The proposed PWM scheme was implemented on a five-level dodecagonal SV structure. Exhaustive simulation and experimental results for steady-state and transient conditions are presented to validate the proposed method.

Full current statistics for a disordered open exclusion process

We consider the nonabelian sandpile model defined on directed trees by Ayyer et al. (2015 Commun. Math. Phys. 335 1065). and restrict it to the special case of a one-dimensional lattice of n sites which has open boundaries and disordered hopping rates. We focus on the joint distribution of the integrated currents across each bond simultaneously, and calculate its cumulant generating function exactly. Surprisingly, the process conditioned on seeing specified currents across each bond turns out to be a renormalised version of the same process. We also remark on a duality property of the large deviation function. Lastly, all eigenvalues and both Perron eigenvectors of the tilted generator are determined.

Design Optimization of Thin-Film Transistors Based on a Metal-Substrate-Semiconductor Architecture for High DC Voltage Sensing

We discuss the potential application of high dc voltage sensing using thin-film transistors (TFTs) on flexible substrates. High voltage sensing has potential applications for power transmission instrumentation. For this, we consider a gate metal-substrate-semiconductor architecture for TFTs. In this architecture, the flexible substrate not only provides mechanical support but also plays the role of the gate dielectric of the TFT. Hence, the thickness of the substrate needs to be optimized for maximizing transconductance, minimizing mechanical stress, and minimizing gate leakage currents. We discuss this optimization, and develop n-type and p-type organic TFTs using polyvinyldene fluoride as the substrate-gate insulator. Circuits are also realized to achieve level shifting, amplification, and high drain voltage operation.