137 resultados para Common carrier
Resumo:
We report the localized charge carrier transport of two-phase composite Zn1-x Ni (x) O/NiO (0 a parts per thousand currency sign x a parts per thousand currency sign 1) using the temperature dependence of ac-resistivity rho (ac)(T) across the N,el temperature T (N) (= 523 K) of nickel oxide. Our results provide strong evidence to the variable range hopping of charge carriers between the localized states through a mechanism involving spin-dependent activation energies. The temperature variation of carrier hopping energy epsilon (h)(T) and nearest-neighbor exchange-coupling parameter J (ij)(T) evaluated from the small poleron model exhibits a well-defined anomaly across T (N). For all the composite systems, the average exchange-coupling parameter (J (ij))(AVG) nearly equals to 70 meV which is slightly greater than the 60-meV exciton binding energy of pure zinc oxide. The magnitudes of epsilon (h) (similar to 0.17 eV) and J (ij) (similar to 11 meV) of pure NiO synthesized under oxygen-rich conditions are consistent with the previously reported theoretical estimation based on Green's function analysis. A systematic correlation between the oxygen stoichiometry and, epsilon (h)(T) and J (ij)(T) is discussed.
Resumo:
In this study, analysis of extending the linear modulation range of a zero common-mode voltage (CMV) operated n-level inverter by allowing reduced CMV switching is presented. A new hybrid seven-level inverter topology with a single DC supply is also presented in this study and inverter operation for zero and reduced CMV is analysed. Each phase of the inverter is realised by cascading two three-level flying capacitor inverters with a half-bridge module in between. Proposed inverter topology is operated with zero CMV for modulation index <86% and is operated with a CMV magnitude of V-dc/18 to extend the modulation range up to 96%. Experimental results are presented for zero CMV operation and for reduced common voltage operation to extend the linear modulation range. A capacitor voltage balancing algorithm is designed utilising the pole voltage redundancies of the inverter, which works for every sampling instant to correct the capacitor voltage irrespective of load power factor and modulation index. The capacitor voltage balancing algorithm is tested for different modulation indices and for various transient conditions, to validate the proposed topology.