An Optimizing Code Generator for a Class of Lattice-Boltzmann Computations

The Lattice-Boltzmann method (LBM), a promising new particle-based simulation technique for complex and multiscale fluid flows, has seen tremendous adoption in recent years in computational fluid dynamics. Even with a state-of-the-art LBM solver such as Palabos, a user has to still manually write the program using library-supplied primitives. We propose an automated code generator for a class of LBM computations with the objective to achieve high performance on modern architectures. Few studies have looked at time tiling for LBM codes. We exploit a key similarity between stencils and LBM to enable polyhedral optimizations and in turn time tiling for LBM. We also characterize the performance of LBM with the Roofline performance model. Experimental results for standard LBM simulations like Lid Driven Cavity, Flow Past Cylinder, and Poiseuille Flow show that our scheme consistently outperforms Palabos-on average by up to 3x while running on 16 cores of an Intel Xeon (Sandybridge). We also obtain an improvement of 2.47x on the SPEC LBM benchmark.

Dynamically Reconfigurable Regular Expression Matching Architecture

Regular Expressions are generic representations for a string or a collection of strings. This paper focuses on implementation of a regular expression matching architecture on reconfigurable fabric like FPGA. We present a Nondeterministic Finite Automata based implementation with extended regular expression syntax set compared to previous approaches. We also describe a dynamically reconfigurable generic block that implements the supported regular expression syntax. This enables formation of the regular expression hardware by a simple cascade of generic blocks as well as a possibility for reconfiguring the generic blocks to change the regular expression being matched. Further,we have developed an HDL code generator to obtain the VHDL description of the hardware for any regular expression set. Our optimized regular expression engine achieves a throughput of 2.45 Gbps. Our dynamically reconfigurable regular expression engine achieves a throughput of 0.8 Gbps using 12 FPGA slices per generic block on Xilinx Virtex2Pro FPGA.

Tiling stencil computations to maximize parallelism

Most stencil computations allow tile-wise concurrent start, i.e., there always exists a face of the iteration space and a set of tiling hyperplanes such that all tiles along that face can be started concurrently. This provides load balance and maximizes parallelism. However, existing automatic tiling frameworks often choose hyperplanes that lead to pipelined start-up and load imbalance. We address this issue with a new tiling technique that ensures concurrent start-up as well as perfect load-balance whenever possible. We first provide necessary and sufficient conditions on tiling hyperplanes to enable concurrent start for programs with affine data accesses. We then provide an approach to find such hyperplanes. Experimental evaluation on a 12-core Intel Westmere shows that our code is able to outperform a tuned domain-specific stencil code generator by 4% to 27%, and previous compiler techniques by a factor of 2x to 10.14x.

An adaptive power-system stabiliser which cancels the negative damping torque of a synchronous generator

The paper presents a new criterion for designing a power-system stabiliser, which is that it should cancel the negative damping torque inherent in a synchronous generator and automatic voltage regulator. The method arises from analysis based on the properties of tensor invariance, but it is easily implemented, and leads to the design of an adaptive controller. Extensive computations and simulation have been performed, and laboratory tests have been conducted on a computer-controlled micromachine system. Results are presented illustrating the effectiveness of the adaptive stabiliser.

A Novel Approach for Designing Generator Excitation controllers Using the IDA-PBC Technique

This paper presents a novel approach for designing of generator excitation controllers using Interconnection and Damping Assignment Passivity Based Control (IDA-PBC) technique for a Single Machine Infinite Bus (SMIB) system that can also be directly used in a multi-machine environment. The generator system equations are modified by referencing the rotor angle with respect to the secondary of the transformer bus instead of the infinite bus. For the modified system equations, IDA-PBC is applied to stabilize the system around an operating condition. The IDA-PBC design results in a Lyapunov function for the modified system. The new control law is practically feasible and can be applied directly to multi-machine system without referring to external system parameters. The effectiveness of the proposed controller is tested on a SMIB and a 10 generator 39 bus test system for a range of operating conditions. The Proposed excitation controller has shown good performance for both small and large disturbances when compared to the performance of a conventional static exciter with power system stabilizer.

Microprocessor-based polynomial generator

A new method of generating polynomials using microprocessors is proposed. The polynomial is generated as a 16-bit digital word. The algorithm for generating a variety of basic 'building block' functions and its implementation is discussed. A technique for generating a generalized polynomial based on the proposed algorithm is indicated. The performance of the proposed generator is evaluated using a commercially available microprocessor kit.

A microprocessor-controlled programmable pulse generator

The hardware and the software details of a user-friendly, simple, flexible and inexpensive pulse programmer using programmable counters interfaced to a microprocessor are described. The control of the various parameters that are required for NMR applications is implemented using the microprocessor. The basic hardware is extendable to other applications which require programmable pulse trains.

Development of a computer code to predict cooling of die and billet in forging

A hot billet in contact with relatively cold dies undergoes rapid cooling in the forging operation. This may give rise to unfilled cavities, poor surface finish and stalling of the press. A knowledge of billet-die temperatures as a function of time is therefore essential for process design. A computer code using finite difference method is written to estimate such temperature histories and validated by comparing the predicted cooling of an integral die-billet configuration with that obtained experimentally.

Sequence generator for periodic sampling of transient phenomena

A simple instrument that can provide a sequence of timed pulses for first initiating a transient process and then enabling sampling and recording periodically during the course of the transient event is described. The time delay between the first of these sampling pulses and the start of the transient event is adjustable. This sequence generator has additional features that make it ideal for use in acquiring the waveforms when a storage oscilloscope is used as the recording device. For avoiding the clutter caused by many waveforms being recorded at the same place on an oscilloscope screen such features as displacements of waveforms in the X and Y directions and trace blanking at places where the waveform is not required, have been incorporated. This sequence generator has been employed to acquire a sequence of Raman scattered radiation signals from an adiabatically expanding saturated vapour probed by a flashlamp-pumped dye laser.

Microprocessor-based polynomial generator

A new method of generating polynomials using microprocessors is proposed. The polynomial is generated as a 16-bit digital word. The algorithm for generating a variety of basic 'building block' functions and its implementation is discussed. A technique for generating a generalized polynomial based on the proposed algorithm is indicated. The performance of the proposed generator is evaluated using a commercially available microprocessor kit.

Improvement in the voltage grading (axial and radial) of the generator column of a Van de Graaf generator by the use of a resistor chain

It is well known that the use of a series of resistors, connected between the equipotential rings of a Van de Graaff generator, improves the axial voltage grading of the generator. The work reported in this paper shows how the resistor chain also improves the radial voltage gradient. The electrolytic field mapping technique was adopted in the present work.

Development of Very High Frequency Damped Sine Wave Generator

In order to protect the critical electronic equipment/system against damped sine transient currents induced into its cables due to transient electromagnetic fields, switching phenomena, platform resonances, etc. it is necessary to provide proper hardening. The hardness assurance provided can be evaluated as per the test CS 116 of MIL STD 461E/F in laboratory by generating & inducing the necessary damped sine currents into the cables of the Equipment Under Test (EUT). The need and the stringent requirements for building a damped sine wave current generator for generation of damped sine current transients of very high frequencies (30 MHz & 100 MHz) have been presented. A method using LC discharge for the generation has been considered in the development. This involves building of extremely low & nearly loss less inductors (about 5 nH & 14 nH) as well as a capacitor & a switch with much lower inductances. A technique for achieving this has been described. Two units (I No for 30 MHz. & 100 MHz each) have been built. Experiments to verify the output are being conducted.

A rate-one full-diversity low-complexity space-time-frequency block code (STFBC) for 4-Tx MIMO-OFDM

It is known that by employing space-time-frequency codes (STFCs) to frequency selective MIMO-OFDM systems, all the three diversity viz spatial, temporal and multipath can be exploited. There exists space-time-frequency block codes (STFBCs) designed using orthogonal designs with constellation precoder to get full diversity (Z.Liu, Y.Xin and G.Giannakis IEEE Trans. Signal Processing, Oct. 2002). Since orthogonal designs of rate one exists only for two transmit antennas, for more than two transmit antennas STFBCs of rate-one and full-diversity cannot be constructed using orthogonal designs. This paper presents a STFBC scheme of rate one for four transmit antennas designed using quasi-orthogonal designs along with co-ordinate interleaved orthogonal designs (Zafar Ali Khan and B. Sundar Rajan Proc: ISIT 2002). Conditions on the signal sets that give full-diversity are identified. Simulation results are presented to show the superiority of our codes over the existing ones.

Parallelization of an unstructured data based cell centre finite volume code, HIFUN-3D

This work describes the parallelization of High Resolution flow solver on unstructured meshes, HIFUN-3D, an unstructured data based finite volume solver for 3-D Euler equations. For mesh partitioning, we use METIS, a software based on multilevel graph partitioning. The unstructured graph used for partitioning is associated with weights both on its vertices and edges. The data residing on every processor is split into four layers. Such a novel procedure of handling data helps in maintaining the effectiveness of the serial code. The communication of data across the processors is achieved by explicit message passing using the standard blocking mode feature of Message Passing Interface (MPI). The parallel code is tested on PACE++128 available in CFD Center

Analysis Of The Hvdc Turbine Generator Torsional Interactions

In the recent past it has been found that HVDC transmission systems and turbine-generator shaft torsional dynamics can interact in an unfavourable manner. This paper presents a detailed linearised state space model of AC/DC system to study this torsional interaction. The model developed is used to study the effect of various system parameters, such as, dc line loading, converter firing angle, the firing scheme employed. The results obtained are compared with those given in[3].