Plasma diagnostics and ITO film deposition by RF-assisted closed-field dual magnetron system

Deposition of indium tin oxide (ITO) among various transparent conductive materials on flexible organic substrates has been intensively investigated among academics and industrials for a whole new array of imaginative optoelectronic products. One critical challenge coming with the organic materials is their poor thermal endurances, considering that the process currently used to produce industry-standard ITO usually involves relatively high substrate temperature in excess of 200°C and post-annealing. A lower processing temperature is thus demanded, among other desires of high deposition rate, large substrate area, good uniformity, and high quality of the deposited materials. For this purpose, we developed an RF-assisted closed-field dual magnetron sputtering system. The “prototype” system consists of a 3-inch unbalanced dual magnetron operated at a closed-field configuration. An RF coil was fabricated and placed between the two magnetron cathodes to initiate a secondary plasma. The concept is to increase the ionization faction with the RF enhancement and utilize the ion energy instead of thermal energy to facilitate the ITO film growth. The closed-field unbalanced magnetrons create a plasma in the intervening region rather than confine it near the target, thus achieving a large-area processing capability. An RF-compensated Langmuir probe was used to characterize and compare the plasmas in mirrored balanced and closed-field unbalanced magnetron configurations. The spatial distributions of the electron density ne and electron temperature Te were measured. The density profiles reflect the shapes of the plasma. Rather than intensively concentrated to the targets/cathodes in the balanced magnetrons, the plasma is more dispersive in the closed-field mode with a twice higher electron density in the substrate region. The RF assistance significantly enhances ne by one or two orders of magnitude higher. The effect of various other parameters, such as pressure, on the plasma was also studied. The ionization fractions of the sputtered atoms were measured using a gridded energy analyzer (GEA) combined with a quartz crystal microbalance (QCM). The presence of the RF plasma effectively increases the ITO ionization fraction to around 80% in both the balanced and closed-field unbalanced configurations. The ionization fraction also varies with pressure, maximizing at 5-10 mTorr. The study of the ionization not only facilitates understanding the plasma behaviors in the RF-assisted magnetron sputtering, but also provides a criterion for optimizing the film deposition process. ITO films were deposited on both glass and plastic (PET) substrates in the 3-inch RF-assisted closed-field magnetrons. The electrical resistivity and optical transmission transparency of the ITO films were measured. Appropriate RF assistance was shown to dramatically reduce the electrical resistivity. An ITO film with a resistivity of 1.2×10-3 Ω-cm and a visible light transmittance of 91% was obtained with a 225 W RF enhancement, while the substrate temperature was monitored as below 110°C. X-ray photoelectron spectroscopy (XPS) was employed to confirm the ITO film stoichiometry. The surface morphology of the ITO films and its effect on the film properties were studied using atomic force microscopy (AFM). The prototype of RF-assisted closed-field magnetron was further extended to a larger rectangular shaped dual magnetron in a flat panel display manufacturing system. Similar improvement of the ITO film conductivities by the auxiliary RF was observed on the large-area PET substrates. Meanwhile, significant deposition rates of 25-42 nm/min were achieved.

Material characterization and process development for indium-arsenide / indium-gallium-antimonide channel, high electron mobility transistors for low power, high speed applications

Efforts to push the performance of transistors for millimeter-wave and microwave applications have borne fruit through device size scaling and the use of novel material systems. III-V semiconductors and their alloys hold a distinct advantage over silicon because they have much higher electron mobility which is a prerequisite for high frequency operation. InGaAs/InP pseudomorphic heterojunction bipolar transistors (HBTs) have demonstrated fT of 765 GHz at room temperature and InP based high electron mobility transistors (HEMTs) have demonstrated fMax of 1.2 THz. The 6.1 A lattice family of InAs, GaSb, AlSb covers a wide variety of band gaps and is an attractive future material system for high speed device development. Extremely high electron mobilities ~ 30,000 cm^2 V^-1s^-1 have been achieved in modulation doped InAs-AlSb structures. The work described in this thesis involves material characterization and process development for HEMT fabrication on this material system.

Low-power high-performance SAR ADC design with digital calibration techniques

This dissertation presents the design of three high-performance successive-approximation-register (SAR) analog-to-digital converters (ADCs) using distinct digital background calibration techniques under the framework of a generalized code-domain linear equalizer. These digital calibration techniques effectively and efficiently remove the static mismatch errors in the analog-to-digital (A/D) conversion. They enable aggressive scaling of the capacitive digital-to-analog converter (DAC), which also serves as sampling capacitor, to the kT/C limit. As a result, outstanding conversion linearity, high signal-to-noise ratio (SNR), high conversion speed, robustness, superb energy efficiency, and minimal chip-area are accomplished simultaneously. The first design is a 12-bit 22.5/45-MS/s SAR ADC in 0.13-μm CMOS process. It employs a perturbation-based calibration based on the superposition property of linear systems to digitally correct the capacitor mismatch error in the weighted DAC. With 3.0-mW power dissipation at a 1.2-V power supply and a 22.5-MS/s sample rate, it achieves a 71.1-dB signal-to-noise-plus-distortion ratio (SNDR), and a 94.6-dB spurious free dynamic range (SFDR). At Nyquist frequency, the conversion figure of merit (FoM) is 50.8 fJ/conversion step, the best FoM up to date (2010) for 12-bit ADCs. The SAR ADC core occupies 0.06 mm2, while the estimated area the calibration circuits is 0.03 mm2. The second proposed digital calibration technique is a bit-wise-correlation-based digital calibration. It utilizes the statistical independence of an injected pseudo-random signal and the input signal to correct the DAC mismatch in SAR ADCs. This idea is experimentally verified in a 12-bit 37-MS/s SAR ADC fabricated in 65-nm CMOS implemented by Pingli Huang. This prototype chip achieves a 70.23-dB peak SNDR and an 81.02-dB peak SFDR, while occupying 0.12-mm2 silicon area and dissipating 9.14 mW from a 1.2-V supply with the synthesized digital calibration circuits included. The third work is an 8-bit, 600-MS/s, 10-way time-interleaved SAR ADC array fabricated in 0.13-μm CMOS process. This work employs an adaptive digital equalization approach to calibrate both intra-channel nonlinearities and inter-channel mismatch errors. The prototype chip achieves 47.4-dB SNDR, 63.6-dB SFDR, less than 0.30-LSB differential nonlinearity (DNL), and less than 0.23-LSB integral nonlinearity (INL). The ADC array occupies an active area of 1.35 mm2 and dissipates 30.3 mW, including synthesized digital calibration circuits and an on-chip dual-loop delay-locked loop (DLL) for clock generation and synchronization.