A "Greater Britain": colonial kin in fictions of settlement, 1850-1890

This dissertation traces the ways in which nineteenth-century fictional narratives of white settlement represent “family” as, on the one hand, an abstract theoretical model for a unified and relatively homogenous British settler empire and on the other, a fundamental challenge to ideas about imperial integrity and transnational Anglo-Saxon racial identification. I argue that representations of transoceanic white families in nineteenth-century fictions about Australian settler colonialism negotiate the tension between the bounded domesticity of an insular English nation and the kind of kinship that spans oceans and continents as a result of mass emigration from the British isles to the United States, Canada, New Zealand, and the Australian colonies. As such, these fictions construct productive analogies between the familial metaphors and affective language in the political discourse of “Greater Britain”—-a transoceanic imagined community of British settler colonies and their “mother country” united by race and language—-and ideas of family, gender, and domesticity as they operate within specific bourgeois families. Concerns over the disruption of transoceanic families bear testament to contradictions between the idea of a unified imperial identity (both British and Anglo-Saxon), the proliferation of fractured local identities (such as settlers’ English, Irish Catholic, and Australian nationalisms), and the conspicuous absence of indigenous families from narratives of settlement. I intervene at the intersection of postcolonial literary criticism and gender theory by examining the strategic deployments of heteronormative kinship metaphors and metonymies in the rhetorical consolidation of settler colonial space. Settler colonialism was distinct from the “civilizing” domination of subject peoples in South Asia in that it depended on the rhetorical construction of colonial territory as empty space or as land occupied by nearly extinct “primitive” races. This dissertation argues that political rhetoric, travel narratives, and fiction used the image of white female bourgeois reproductive power and sentimental attachment as a technology for settler colonial success, embodying this technology both in the benevolent figure of the metropolitan “mother country” (the paternalistic female counter to the material realities of patriarchal and violent settler colonial practices) and in fictional juxtapositions of happy white settler fecund families with the solitary self-extinguishing figure of the black aboriginal “savage.” Yet even in the narratives where the continuity and coherence of families across imperial space is questioned—-and “Greater Britain” itself—-domesticity and heteronormative familial relations effectively rewrite settler space as white, Anglo-Saxon and bourgeois, and the sentimentalism of troubled European families masks the presence and genocide of indigenous aboriginal peoples. I analyze a range of novels and political texts, canonical and non-canonical, metropolitan and colonial. My introductory first chapter examines the discourse on a “Greater Britain” in the travel narratives of J.A. Froude, Charles Wentworth Dilke, and Anthony Trollope and in the Oxbridge lectures of Herman Merivale and J.R. Seeley. These writers make arguments for an imperial economy of affect circulating between Britain and the settler colonies that reinforces political connections, and at times surpasses the limits of political possibility by relying on the language of sentiment and feeling to build a transoceanic “Greater British” community. Subsequent chapters show how metropolitan and colonial fiction writers, including Charles Dickens, Anthony Trollope, Marcus Clarke, Henry Kingsley, and Catherine Helen Spence, test the viability of this “Greater British” economy of affect by presenting transoceanic family connections and structures straining under the weight of forces including the vast distances between colonies and the “mother country,” settler violence, and the transportation system.

Low-power high-performance SAR ADC design with digital calibration techniques

This dissertation presents the design of three high-performance successive-approximation-register (SAR) analog-to-digital converters (ADCs) using distinct digital background calibration techniques under the framework of a generalized code-domain linear equalizer. These digital calibration techniques effectively and efficiently remove the static mismatch errors in the analog-to-digital (A/D) conversion. They enable aggressive scaling of the capacitive digital-to-analog converter (DAC), which also serves as sampling capacitor, to the kT/C limit. As a result, outstanding conversion linearity, high signal-to-noise ratio (SNR), high conversion speed, robustness, superb energy efficiency, and minimal chip-area are accomplished simultaneously. The first design is a 12-bit 22.5/45-MS/s SAR ADC in 0.13-μm CMOS process. It employs a perturbation-based calibration based on the superposition property of linear systems to digitally correct the capacitor mismatch error in the weighted DAC. With 3.0-mW power dissipation at a 1.2-V power supply and a 22.5-MS/s sample rate, it achieves a 71.1-dB signal-to-noise-plus-distortion ratio (SNDR), and a 94.6-dB spurious free dynamic range (SFDR). At Nyquist frequency, the conversion figure of merit (FoM) is 50.8 fJ/conversion step, the best FoM up to date (2010) for 12-bit ADCs. The SAR ADC core occupies 0.06 mm2, while the estimated area the calibration circuits is 0.03 mm2. The second proposed digital calibration technique is a bit-wise-correlation-based digital calibration. It utilizes the statistical independence of an injected pseudo-random signal and the input signal to correct the DAC mismatch in SAR ADCs. This idea is experimentally verified in a 12-bit 37-MS/s SAR ADC fabricated in 65-nm CMOS implemented by Pingli Huang. This prototype chip achieves a 70.23-dB peak SNDR and an 81.02-dB peak SFDR, while occupying 0.12-mm2 silicon area and dissipating 9.14 mW from a 1.2-V supply with the synthesized digital calibration circuits included. The third work is an 8-bit, 600-MS/s, 10-way time-interleaved SAR ADC array fabricated in 0.13-μm CMOS process. This work employs an adaptive digital equalization approach to calibrate both intra-channel nonlinearities and inter-channel mismatch errors. The prototype chip achieves 47.4-dB SNDR, 63.6-dB SFDR, less than 0.30-LSB differential nonlinearity (DNL), and less than 0.23-LSB integral nonlinearity (INL). The ADC array occupies an active area of 1.35 mm2 and dissipates 30.3 mW, including synthesized digital calibration circuits and an on-chip dual-loop delay-locked loop (DLL) for clock generation and synchronization.