3 resultados para test development
em Glasgow Theses Service
Resumo:
Objective: The purpose of this study was to develop and test psychometric properties of a Mealtime Interaction Clinical Observation Tool (MICOT) that could be used to facilitate assessment and behavioural intervention in childhood feeding difficulties. Methods: Thematic analysis of four focus groups with feeding and behaviour experts identified the content and structure of the MICOT. Following refinement, inter-rater reliability was tested between three healthcare professionals. Results: Six themes were identified for the MICOT, which utilises a traffic-light system to identify areas of strength and areas for intervention. Despite poor inter-rater reliability, for which a number of reasons are postulated, some correlation between psychologists’ ratings was evident. Healthcare professionals liked the tool and reported that it could have good clinical utility. Conclusion: The study provides a promising first version of a clinical observation tool that facilitates assessment and behavioural intervention in childhood feeding difficulties.
Resumo:
The present doctoral thesis studies the association between pre-colonial institutions and long-run development in Latin America. The thesis is organised as follows: Chapter 1 places the motivation of the thesis by underlying relevant contributions in the literature on long-run development. I then set out the main objective of the thesis, followed by a brief outline of it. In Chapter 2, I study the effects of pre-colonial institutions on present-day socioeconomic outcomes for Latin America. The main thesis of this chapter is that more advanced pre-colonial institutions relate to better socioeconomic outcomes today - principally, but not only, through their effects on the Amerindian population. I test such hypothesis with a dataset of 324 sub-national administrative units covering all mainland Latin American countries. The extensive range of controls covers factors such as climate, location, natural resources, colonial activities and pre-colonial characteristics - plus country fixed effects. Results strongly support the main thesis. In Chapter 3, I further analyse the association between pre-colonial institutions and present-day economic development in Latin America by using the historical ethnic homelands as my main unit of analysis. The main hypothesis is that ethnic homelands inhabited by more advanced ethnic groups -as measured by their levels of institutional complexity- relate to better economic development today. To track these long-run effects, I construct a new dataset by digitising historiographical maps allowing me to pinpoint the geospatial location of ethnic homelands as of the XVI century. As a result, 375 ethnic homelands are created. I then capture the levels of economic development at the ethnic homeland level by making use of alternative economic measures --satellite light density data. After controlling for country-specific characteristics and applying a large battery of geographical, locational, and historical factors, I found that the effects of pre-colonial institutions relate to a higher light density --as a proxy for economic activity- in ethnic homelands where more advanced ethnic groups lived. In Chapter 4, I explore a mechanism linking the persistence of pre-colonial institutions in Latin America over the long-run: Colonial and post-colonial strategies along with the ethnic political capacity worked in tandem allowing larger Amerindian groups to "support" the new political systems in ways that would benefit their respective ethnic groups as well as the population at large. This mechanism may have allowed the effects of pre-colonial institutions to influence socioeconomic development outcomes up to today. To shed lights on this mechanism, I combine the index of pre-colonial institutions prepared for the second chapter of the present thesis with individual-level survey data on people's attitudes. By controlling for key observable and unobservable country-specific characteristics, the main empirical results show that areas with a history of more advanced pre-colonial institutions increase the probability of individuals supporting present-day political institutions. Finally, in Chapter 5, I summarise the main findings of the thesis, and emphasise the key weaknesses of the study as well as potential avenues for future research.
Resumo:
Conventional Si complementary-metal-oxide-semiconductor (CMOS) scaling is fast approaching its limits. The extension of the logic device roadmap for future enhancements in transistor performance requires non-Si materials and new device architectures. III-V materials, due to their superior electron transport properties, are well poised to replace Si as the channel material beyond the 10nm technology node to mitigate the performance loss of Si transistors from further reductions in supply voltage to minimise power dissipation in logic circuits. However several key challenges, including a high quality dielectric/III-V gate stack, a low-resistance source/drain (S/D) technology, heterointegration onto a Si platform and a viable III-V p-metal-oxide-semiconductor field-effect-transistor (MOSFET), need to be addressed before III-Vs can be employed in CMOS. This Thesis specifically addressed the development and demonstration of planar III-V p-MOSFETs, to complement the n-MOSFET, thereby enabling an all III-V CMOS technology to be realised. This work explored the application of InGaAs and InGaSb material systems as the channel, in conjunction with Al2O3/metal gate stacks, for p-MOSFET development based on the buried-channel flatband device architecture. The body of work undertaken comprised material development, process module development and integration into a robust fabrication flow for the demonstration of p-channel devices. The parameter space in the design of the device layer structure, based around the III-V channel/barrier material options of Inx≥0.53Ga1-xAs/In0.52Al0.48As and Inx≥0.1Ga1-xSb/AlSb, was systematically examined to improve hole channel transport. A mobility of 433 cm2/Vs, the highest room temperature hole mobility of any InGaAs quantum-well channel reported to date, was obtained for the In0.85Ga0.15As (2.1% strain) structure. S/D ohmic contacts were developed based on thermally annealed Au/Zn/Au metallisation and validated using transmission line model test structures. The effects of metallisation thickness, diffusion barriers and de-oxidation conditions were examined. Contacts to InGaSb-channel structures were found to be sensitive to de-oxidation conditions. A fabrication process, based on a lithographically-aligned double ohmic patterning approach, was realised for deep submicron gate-to-source/drain gap (Lside) scaling to minimise the access resistance, thereby mitigating the effects of parasitic S/D series resistance on transistor performance. The developed process yielded gaps as small as 20nm. For high-k integration on GaSb, ex-situ ammonium sulphide ((NH4)2S) treatments, in the range 1%-22%, for 10min at 295K were systematically explored for improving the electrical properties of the Al2O3/GaSb interface. Electrical and physical characterisation indicated the 1% treatment to be most effective with interface trap densities in the range of 4 - 10×1012cm-2eV-1 in the lower half of the bandgap. An extended study, comprising additional immersion times at each sulphide concentration, was further undertaken to determine the surface roughness and the etching nature of the treatments on GaSb. A number of p-MOSFETs based on III-V-channels with the most promising hole transport and integration of the developed process modules were successfully demonstrated in this work. Although the non-inverted InGaAs-channel devices showed good current modulation and switch-off characteristics, several aspects of performance were non-ideal; depletion-mode operation, modest drive current (Id,sat=1.14mA/mm), double peaked transconductance (gm=1.06mS/mm), high subthreshold swing (SS=301mV/dec) and high on-resistance (Ron=845kΩ.μm). Despite demonstrating substantial improvement in the on-state metrics of Id,sat (11×), gm (5.5×) and Ron (5.6×), inverted devices did not switch-off. Scaling gate-to-source/drain gap (Lside) from 1μm down to 70nm improved Id,sat (72.4mA/mm) by a factor of 3.6 and gm (25.8mS/mm) by a factor of 4.1 in inverted InGaAs-channel devices. Well-controlled current modulation and good saturation behaviour was observed for InGaSb-channel devices. In the on-state In0.3Ga0.7Sb-channel (Id,sat=49.4mA/mm, gm=12.3mS/mm, Ron=31.7kΩ.μm) and In0.4Ga0.6Sb-channel (Id,sat=38mA/mm, gm=11.9mS/mm, Ron=73.5kΩ.μm) devices outperformed the InGaAs-channel devices. However the devices could not be switched off. These findings indicate that III-V p-MOSFETs based on InGaSb as opposed to InGaAs channels are more suited as the p-channel option for post-Si CMOS.