Tracing outsideness: young women's institutional journeys and the geographies of closed space

Understanding confinement and its complex workings between individuals and society has been the stated aim of carceral geography and wider studies on detention. This project contributes ethnographic insights from multiple sites of incarceration, working with an under-researched group within confined populations. Focussing on young female detainees in Scotland, this project seeks to understand their experiences of different types of ‘closed’ space. Secure care, prison and closed psychiatric facilities all impact on the complex geographies of these young women’s lives. The fluid but always situated relations of control and care provide the backdrop for their journeys in/out and beyond institutional spaces. Understanding institutional journeys with reference to age and gender allows an insight into the highly mobile, often precarious, and unfamiliar lives of these young women who live on the margins. This thesis employs a mixed-method qualitative approach and explores what Goffman calls the ‘tissue and fabric’ of detention as a complex multi-institutional practice. In order to be able to understand the young women’s gendered, emotional and often repetitive experiences of confinement, analysis of the constitution of ‘closed space’ represents a first step for inquiry. The underlying nature of inner regimes, rules and discipline in closed spaces, provide the background on which confinement is lived, perceived and processed. The second part of the analysis is the exploration of individual experiences ‘on the inside’, ranging from young women’s views on entering a closed institution, the ways in which they adapt or resist the regime, and how they cope with embodied aspects of detention. The third and final step considers the wider context of incarceration by recovering the young women’s journeys through different types of institutional spaces and beyond. The exploration of these journeys challenges and re-develops understandings of mobility and inertia by engaging the relative power of carceral archipelagos and the figure of femina sacra. This project sits comfortably within the field of carceral geography while also pushing at its boundaries. On a conceptual level, a re-engagement with Goffman’s micro-analysis challenges current carceral-geographic theory development. Perhaps more importantly, this project pushes for an engagement with different institutions under the umbrella of carceral geography, thus creating new dialogues on issues like ‘care’ and ‘control’. Finally, an engagement with young women addresses an under-represented population within carceral geography in ways that raise distinctly problematic concerns for academic research and penal policy. Overall, this project aims to show the value of fine grained micro-level research in institutional geographies for extending thinking and understanding about society’s responses to a group of people who live on the margins of social and legal norms.

The development of planar high-K/III-V p-channel MOSFETs for post-silicon CMOS

Conventional Si complementary-metal-oxide-semiconductor (CMOS) scaling is fast approaching its limits. The extension of the logic device roadmap for future enhancements in transistor performance requires non-Si materials and new device architectures. III-V materials, due to their superior electron transport properties, are well poised to replace Si as the channel material beyond the 10nm technology node to mitigate the performance loss of Si transistors from further reductions in supply voltage to minimise power dissipation in logic circuits. However several key challenges, including a high quality dielectric/III-V gate stack, a low-resistance source/drain (S/D) technology, heterointegration onto a Si platform and a viable III-V p-metal-oxide-semiconductor field-effect-transistor (MOSFET), need to be addressed before III-Vs can be employed in CMOS. This Thesis specifically addressed the development and demonstration of planar III-V p-MOSFETs, to complement the n-MOSFET, thereby enabling an all III-V CMOS technology to be realised. This work explored the application of InGaAs and InGaSb material systems as the channel, in conjunction with Al2O3/metal gate stacks, for p-MOSFET development based on the buried-channel flatband device architecture. The body of work undertaken comprised material development, process module development and integration into a robust fabrication flow for the demonstration of p-channel devices. The parameter space in the design of the device layer structure, based around the III-V channel/barrier material options of In_x≥0.53Ga_1-xAs/In_0.52Al_0.48As and In_x≥0.1Ga_1-xSb/AlSb, was systematically examined to improve hole channel transport. A mobility of 433 cm²/Vs, the highest room temperature hole mobility of any InGaAs quantum-well channel reported to date, was obtained for the In_0.85Ga_0.15As (2.1% strain) structure. S/D ohmic contacts were developed based on thermally annealed Au/Zn/Au metallisation and validated using transmission line model test structures. The effects of metallisation thickness, diffusion barriers and de-oxidation conditions were examined. Contacts to InGaSb-channel structures were found to be sensitive to de-oxidation conditions. A fabrication process, based on a lithographically-aligned double ohmic patterning approach, was realised for deep submicron gate-to-source/drain gap (L_side) scaling to minimise the access resistance, thereby mitigating the effects of parasitic S/D series resistance on transistor performance. The developed process yielded gaps as small as 20nm. For high-k integration on GaSb, ex-situ ammonium sulphide ((NH₄)₂S) treatments, in the range 1%-22%, for 10min at 295K were systematically explored for improving the electrical properties of the Al₂O₃/GaSb interface. Electrical and physical characterisation indicated the 1% treatment to be most effective with interface trap densities in the range of 4 - 10×10¹²cm^-2eV^-1 in the lower half of the bandgap. An extended study, comprising additional immersion times at each sulphide concentration, was further undertaken to determine the surface roughness and the etching nature of the treatments on GaSb. A number of p-MOSFETs based on III-V-channels with the most promising hole transport and integration of the developed process modules were successfully demonstrated in this work. Although the non-inverted InGaAs-channel devices showed good current modulation and switch-off characteristics, several aspects of performance were non-ideal; depletion-mode operation, modest drive current (I_d,sat=1.14mA/mm), double peaked transconductance (g_m=1.06mS/mm), high subthreshold swing (SS=301mV/dec) and high on-resistance (R_on=845kΩ.μm). Despite demonstrating substantial improvement in the on-state metrics of I_d,sat (11×), g_m (5.5×) and R_on (5.6×), inverted devices did not switch-off. Scaling gate-to-source/drain gap (L_side) from 1μm down to 70nm improved I_d,sat (72.4mA/mm) by a factor of 3.6 and gm (25.8mS/mm) by a factor of 4.1 in inverted InGaAs-channel devices. Well-controlled current modulation and good saturation behaviour was observed for InGaSb-channel devices. In the on-state In_0.3Ga_0.7Sb-channel (I_d,sat=49.4mA/mm, g_m=12.3mS/mm, R_on=31.7kΩ.μm) and In_0.4Ga_0.6Sb-channel (I_d,sat=38mA/mm, g_m=11.9mS/mm, R_on=73.5kΩ.μm) devices outperformed the InGaAs-channel devices. However the devices could not be switched off. These findings indicate that III-V p-MOSFETs based on InGaSb as opposed to InGaAs channels are more suited as the p-channel option for post-Si CMOS.