Single Events in a COTS Soft-Error Free SRAM at Low Bias Voltage Induced by 15-MeV Neutrons

This paper presents an experimental study of the sensitivity to 15-MeV neutrons of Advanced Low Power SRAMs (A-LPSRAM) at low bias voltage little above the threshold value that allows the retention of data. This family of memories is characterized by a 3D structure to minimize the area penalty and to cope with latchups, as well as by the presence of integrated capacitors to hinder the occurrence of single event upsets. In low voltage static tests, classical single event upsets were a minor source of errors, but other unexpected phenomena such as clusters of bitflips and hard errors turned out to be the origin of hundreds of bitflips. Besides, errors were not observed in dynamic tests at nominal voltage. This behavior is clearly different than that of standard bulk CMOS SRAMs, where thousands of errors have been reported.

Statistical Anomalies of Bitflips in SRAMs to Discriminate SBUs from MCUs

Recently, the occurrence of multiple events in static tests has been investigated by checking the statistical distribution of the difference between the addresses of the words containing bitflips. That method has been successfully applied to Field Programmable Gate Arrays (FPGAs) and the original authors indicate that it is also valid for SRAMs. This paper presents a modified methodology that is based on checking the XORed addresses with bitflips, rather than on the difference. Irradiation tests on CMOS 130 & 90 nm SRAMs with 14-MeV neutrons have been performed to validate this methodology. Results in high-altitude environments are also presented and cross-checked with theoretical predictions. In addition, this methodology has also been used to detect modifications in the organization of said memories. Theoretical predictions have been validated with actual data provided by the manufacturer.

Dual self-image technique for beam collimation

We propose an accurate technique for obtaining highly collimated beams, which also allows testing the collimation degree of a beam. It is based on comparing the period of two different self-images produced by a single diffraction grating. In this way, variations in the period of the diffraction grating do not affect to the measuring procedure. Self-images are acquired by two CMOS cameras and their periods are determined by fitting the variogram function of the self-images to a cosine function with polynomial envelopes. This way, loss of accuracy caused by imperfections of the measured self-images is avoided. As usual, collimation is obtained by displacing the collimation element with respect to the source along the optical axis. When the period of both self-images coincides, collimation is achieved. With this method neither a strict control of the period of the diffraction grating nor a transverse displacement, required in other techniques, are necessary. As an example, a LED considering paraxial approximation and point source illumination is collimated resulting a resolution in the divergence of the beam of σ φ = ± μrad.