A programmable SIMD vision chip for real-time vision applications

A programmable vision chip for real-time vision applications is presented. The chip architecture is a combination of a SIMD processing element array and row-parallel processors, which can perform pixel-parallel and row-parallel operations at high speed. It implements the mathematical morphology method to carry out low-level and mid-level image processing and sends out image features for high-level image processing without I/O bottleneck. The chip can perform many algorithms through software control. The simulated maximum frequency of the vision chip is 300 MHz with 16 x 16 pixels resolution. It achieves the rate of 1000 frames per second in real-time vision. A prototype chip with a 16 x 16 PE array is fabricated by the 0.18 mu m standard CMOS process. It has a pixel size of 30 mu m x 40 mu m and 8.72 mW power consumption with a 1.8 V power supply. Experiments including the mathematical morphology method and target tracking application demonstrated that the chip is fully functional and can be applied in real-time vision applications.

Compact universal logic gates realized using quantization of current in nanodevices

This paper proposes novel universal logic gates using the current quantization characteristics of nanodevices. In nanodevices like the electron waveguide (EW) and single-electron (SE) turnstile, the channel current is a staircase quantized function of its control voltage. We use this unique characteristic to compactly realize Boolean functions. First we present the concept of the periodic-threshold threshold logic gate (PTTG), and we build a compact PTTG using EW and SE turnstiles. We show that an arbitrary three-input Boolean function can be realized with a single PTTG, and an arbitrary four-input Boolean function can be realized by using two PTTGs. We then use one PTTG to build a universal programmable two-input logic gate which can be used to realize all two-input Boolean functions. We also build a programmable three-input logic gate by using one PTTG. Compared with linear threshold logic gates, with the PTTG one can build digital circuits more compactly. The proposed PTTGs are promising for future smart nanoscale digital system use.

Intelligent control of avalanched photodiode to get optimal state

To improve the sensitivity of our laser radar system, we provided a set of control method for APDs (Avalanched Photodiodes) based on single-chip computer together with the circuits dealing with noise and temperature. It adjusts the voltages intelligently and maintains the APD's optimal working status.

Determination of SARS-coronavirus by a microfluidic chip system

We have developed a new experimental system based on a microfluidic chip to determine severe acute respiratory syndrome coronavirus (SARS-Cov). The system includes a laser-induced fluorescence microfluidic chip analyzer, a glass microchip for both polymerase chain reaction (PCR) and capillary electrophoresis, a chip thermal cycler based on dual Peltier thermoelectric elements, a reverse transcription-polymerase chain reaction (RT-PCR) SARS diagnostic kit, and a DNA electrophoretic sizing kit. The system allows efficient cDNA amplification of SARS-CoV followed by electrophoretic sizing and detection on the same chip. To enhance the reliability of RT-PCR on SARS-CoV detection, duplex PCR was developed on the microchip. The assay was carried out on a home-made microfluidic chip system. The positive and the negative control were cDNA fragments of SARS-CoV and parainfluenza virus, respectively. The test results showed that 17 positive samples were obtained among 18 samples of nasopharyngeal swabs from clinically diagnosed SARS patients. However, 12 positive results from the same 18 samples were obtained by the conventional RT-PCR with agarose gel electrophoresis detection. The SARS virus species can be analyzed with high positive rate and rapidity on the microfluidic chip system.