9 resultados para television programming

em Chinese Academy of Sciences Institutional Repositories Grid Portal


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This paper describes a two-step packing algorithm for LUT clusters of which the LUT input multipliers are depopulated. In the first step, a greedy algorithm is used to search for BLE locations and cluster inputs. If the greedy algorithm fails, the second step with network flow programming algorithm is employed. Numerical results illustrate that our two-step packing algorithm obtains better packing density than one-step greedy packing algorithm.

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In this paper we present a methodology and its implementation for the design and verification of programming circuit used in a family of application-specific FPGAs that share a common architecture. Each member of the family is different either in the types of functional blocks contained or in the number of blocks of each type. The parametrized design methodology is presented here to achieve this goal. Even though our focus is on the programming circuitry that provides the interface between the FPGA core circuit and the external programming hardware, the parametrized design method can be generalized to the design of entire chip for all members in the FPGA family. The method presented here covers the generation of the design RTL files and the support files for synthesis, place-and-route layout and simulations. The proposed method is proven to work smoothly within the complete chip design methodology. We will describe the implementation of this method to the design of the programming circuit in details including the design flow from the behavioral-level design to the final layout as well as the verification. Different package options and different programming modes are included in the description of the design. The circuit design implementation is based on SMIC 0.13-micron CMOS technology.

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The wideband high-linearity mixers for a double conversion cable TV tuner is presented. The up-conversion mixer converts the input signal from 100MHz to 1000 MHz to the intermediate frequency (IF) of I GHz above. And the down-conversion mixer converts the frequency back. The degeneration resistors are used to Improve the linearity. The tuner is implemented in a 0.35 mu m SiGe technology. Input power at 1dB compression point can reach +14.23dBm. The lowest noise figure is 17.5dB. The two mixers consume 103mW under a supply voltage of 5 V.

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The formal specification language LFC was designed to support formal specification acquisition. However, it is yet suited to be used as a meta-language for specifying programming language processing. This paper introduces LFC as a meta-language, and compares it with ASF+SDF, an algebraic specification formalism that can also be used to programming languages.

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本文提出一个不用 Kuhn- Tucker条件而直接搜索严格凸二次规划最优目标点的鲁棒方法 .在搜索过程中 ,目标点沿约束多面体边界上的一条折线移动 .这种移动目标点的思想可以被认为是线性规划单纯形法的自然推广 ,在单纯形法中 ,目标点从一个顶点移到另一个顶点。