A power-saving scheme for IEEE 802.11 Ad hoc networks

In the Wireless Local Area Networks (WLANs), the terminals are often powered by battery, so the power-saving performance of the wireless network card is a very important issue. For IEEE 802.11 Ad hoc networks, a power-saving scheme is presented in Medium Access Control (MAC) layer to reduce the power consumption by allowing the nodes enter into the sleep mode, but the scheme is based on Time-Drive Scheme (TDS) whose power-saving efficiency becomes lower and lower with the network load increasing. This paper presented a novel energy-saving mechanism, called as Hybrid-Drive Scheme (HDS), which introduces into a Message.-Drive Scheme (MDS) and combines MDS with the conventional TDS. The MDS, could obtain high efficiency when the load is heavy; meanwhile the TDS has high efficiency when the network load is small. The analysis shows that the proposed HDS could obtain high energy-efficiency whether the network load is light or heavy and have higher energy-saving efficiency than conventional scheme in the IEEE 802.11 standard.

Optimization of Global Signal Networks for Island-Style FPGAs

We present a staggered buffer connection method that provides flexibility for buffer insertion while designing global signal networks using the tile-based FPGA design methodology. An exhaustive algorithm is used to analyze the trade-off between area and speed of the global signal networks for this staggered buffer insertion scheme, and the criterion for determining the design parameters is presented. The comparative analytic result shows that the methods in this paper are proven to be more efficient for FPGAs with a large array size.