Digital holographic aberration compensation in electron holography

This paper proposes a new digital method to compensate for the aberration of an electron objective lens in electron holography. In this method, the object wavefront in the exit pupil plane is numerically reconstructed from a digitized electron hologram, and is corrected by multiplying it with the conjugated phase-error function. Then, an aberration-free image can be obtained by calculating the Fresnel integral of this corrected wavefront. In comparison with traditional methods, this method is much more convenient and accurate. Some verifying experiments are also presented in this paper. (C) 2003 Society of Photo-optical Instrumentation Engineers.

Analog-digital and digital-analog converters using single-electron and MOS transistors

This paper proposes two kinds of novel single-electron analog-digital conversion (ADC) and digital-analog conversion (DAC) circuits that consist of single-electron transistors (SETs) and metal-oxide-semiconductor (MOS) transistors. The SET/MOS hybrid ADC and DAC circuits possess the merits of the SET circuit and the MOS circuit. We obtain the SPICE macro-modeling code of the SET transistor by studying and fitting the characteristics of the SET with SPICE simulation and Monte Carlo simulation methods. The SPICE macro-modeling code is used for the simulation of the SET/MOS hybrid ADC and DAC circuits. We simulate the performances of the SET/MOS hybrid 3-b ADC and 2-b DAC circuits by using the H-SPICE simulator. The simulation results demonstrate that the hybrid circuits can perform analog-digital and digital-analog data conversion well at room temperature. The hybrid ADC and DAC circuits have advantages as-follows: 1) compared with conventional circuits, the architectures of the circuits are simpler; 2) compared with single electron transistor circuits, the circuits have much larger load capability; 3) the power dissipation of the circuits are lower than uW; 4) the data conversion rate of the circuits can exceed 100 MHz; and 5) the resolution of the ADC and DAC circuits can be increased by the pipeline architectures.