Design of Narrow-Gap TiO2: A Passivated Codoping Approach for Enhanced Photoelectrochemical Activity

To improve the photoelectrochemical activity of TiO2 for hydrogen production through water splitting, the band edges of TiO2 should be tailored to match with visible light absorption and the hydrogen or oxygen production levels. By analyzing the band structure of TiO2 and the chemical potentials of the dopants, we propose that the band edges of TiO2 can be modified by passivated codopants such as (Mo+C) to shift the valence band edge up significantly, while leaving the conduction band edge almost unchanged, thus satisfying the stringent requirements. The design principle for the band-edge modification should be applicable to other wide-band-gap semiconductors.

Design of shallow acceptors in ZnO through compensated donor-acceptor complexes: A density functional calculation

The intrinsic large electronegativity of O 2p character of the valence-band maximum (VBM) of ZnO renders it extremely difficult to be doped p type. We show from density functional calculation that such VBM characteristic can be altered by compensated donor-acceptor pairs, thus improve the p-type dopability. By incorporating (Ti+C) or (Zr+C) into ZnO simultaneously, a fully occupied impurity band that has the C 2p character is created above the VBM of host ZnO. Subsequent doping by N in ZnO: (Ti+C) and ZnO: (Zr+C) lead to the acceptor ionization energies of 0.18 and 0.13 eV, respectively, which is about 200 meV lower than it is in pure ZnO.

Design and Verification of the Programming Circuit in an Application-Specific FPGA

In this paper we present a methodology and its implementation for the design and verification of programming circuit used in a family of application-specific FPGAs that share a common architecture. Each member of the family is different either in the types of functional blocks contained or in the number of blocks of each type. The parametrized design methodology is presented here to achieve this goal. Even though our focus is on the programming circuitry that provides the interface between the FPGA core circuit and the external programming hardware, the parametrized design method can be generalized to the design of entire chip for all members in the FPGA family. The method presented here covers the generation of the design RTL files and the support files for synthesis, place-and-route layout and simulations. The proposed method is proven to work smoothly within the complete chip design methodology. We will describe the implementation of this method to the design of the programming circuit in details including the design flow from the behavioral-level design to the final layout as well as the verification. Different package options and different programming modes are included in the description of the design. The circuit design implementation is based on SMIC 0.13-micron CMOS technology.