基于ARM的可编程控制系统实现

采用ARM设计小型可编程控制器,提供基于以太网和OPC标准的组态监控接口。用户采用符合IEC61131-3标准的梯形图方式对控制器自由编程,并通过计算机网络对其进行程序调试、下载和数据通信,从而实现了一套经济实用的小型可编程控制系统。

新型汽车变速箱压装机控制系统的设计

文章介绍了一种新型汽车变速箱压装机控制系统的设计,对系统的硬件组态及控制功能作了主要描述。汽车变速箱压装机是汽车变速箱装配流水线上的一台机电一体化专用自动装配设备,该机除具有自动压装功能、自动检测报警功能外,还能与装配管理系统联网,实现网络化管理与控制功能。整个系统采用了SLC500可编程控制器、触摸屏、安全光幕控制器等控制部件,为机床提供了安全可靠的装配质量保证。

A 1,000 Frames/s Programmable Vision Chip with Variable Resolution and Row-Pixel-Mixed Parallel Image Processors

A programmable vision chip with variable resolution and row-pixel-mixed parallel image processors is presented. The chip consists of a CMOS sensor array, with row-parallel 6-bit Algorithmic ADCs, row-parallel gray-scale image processors, pixel-parallel SIMD Processing Element (PE) array, and instruction controller. The resolution of the image in the chip is variable: high resolution for a focused area and low resolution for general view. It implements gray-scale and binary mathematical morphology algorithms in series to carry out low-level and mid-level image processing and sends out features of the image for various applications. It can perform image processing at over 1,000 frames/s (fps). A prototype chip with 64 x 64 pixels resolution and 6-bit gray-scale image is fabricated in 0.18 mu m Standard CMOS process. The area size of chip is 1.5 mm x 3.5 mm. Each pixel size is 9.5 mu m x 9.5 mu m and each processing element size is 23 mu m x 29 mu m. The experiment results demonstrate that the chip can perform low-level and mid-level image processing and it can be applied in the real-time vision applications, such as high speed target tracking.

Pulse compression by filamentation in argon with an acoustic optical programmable dispersive filter for predispersion compensation

We have experimentally demonstrated pulses 0.4 mJ in duration smaller than 12 fs; with an excellent spatial beam profile by self-guided propagation in argon. The original 52 fs pulses from the chirped pulsed amplification laser system are first precompressed to 32 fs by inserting an acoustic optical programmable dispersive filter instrument into the laser system for spectrum reshaping and dispersion compensation, and the pulse spectrum is subsequently broadened by filamentation in an argon cell. By using chirped mirrors for post-dispersion compensation, the pulses are successfully compressed to smaller than 12 fs.

A low-cost CMOS programmable temperature

A novel uncalibrated CMOS programmable temperature switch with high temperature accuracy is presented. Its threshold temperature T-th can be programmed by adjusting the ratios of width and length of the transistors. The operating principles of the temperature switch circuit is theoretically explained. A floating gate neural MOS circuit is designed to compensate automatically the threshold temperature T-th variation that results form the process tolerance. The switch circuit is implemented in a standard 0.35 mu m CMOS process. The temperature switch can be programmed to perform the switch operation at 16 different threshold temperature T(th)s from 45-120 degrees C with a 5 degrees C increment. The measurement shows a good consistency in the threshold temperatures. The chip core area is 0.04 mm(2) and power consumption is 3.1 mu A at 3.3V power supply. The advantages of the temperature switch are low power consumption, the programmable threshold temperature and the controllable hysteresis.

A programmable SIMD vision chip for real-time vision applications

A programmable vision chip for real-time vision applications is presented. The chip architecture is a combination of a SIMD processing element array and row-parallel processors, which can perform pixel-parallel and row-parallel operations at high speed. It implements the mathematical morphology method to carry out low-level and mid-level image processing and sends out image features for high-level image processing without I/O bottleneck. The chip can perform many algorithms through software control. The simulated maximum frequency of the vision chip is 300 MHz with 16 x 16 pixels resolution. It achieves the rate of 1000 frames per second in real-time vision. A prototype chip with a 16 x 16 PE array is fabricated by the 0.18 mu m standard CMOS process. It has a pixel size of 30 mu m x 40 mu m and 8.72 mW power consumption with a 1.8 V power supply. Experiments including the mathematical morphology method and target tracking application demonstrated that the chip is fully functional and can be applied in real-time vision applications.

An adaptive controller for a class of nonlinear system using direction basis function

For a class of nonlinear dynamical systems, the adaptive controllers are investigated using direction basis function (DBF) in this paper. Based on the criterion of Lyapunov' stability, DBF is designed which guarantees that the output of the controlled system asymptotically tracks the reference signals. Finally, the simulation shows the good tracking effectiveness of the adaptive controller.

Quantum well controller

A quantum well controller (QWC) consisting of a direct-gap/indirect-gap quantum well and a doping interface is proposed to control the dynamic operation of the Gunn active layer. Through the Monte Carlo simulation a new relaxation mode for this new device is found. The oscillation and amplification behavior of the Gunn active layer under the control of the QWC is investigated theoretically and experimentally. All work demonstrates the great control capacity of the QWC and provides a new way to improve the performance of semiconductor devices. A new oscillation diode made of the QWC and a Gunn active layer has been designed and fabricated. In the 8 mm band the highest pulse output power of these diodes is 2.55 W and the highest conversion efficiency is 18%.

Pulse Compression by Filamentation in Argon with an Acoustic Optical Programmable Dispersive Filter for Predispersion Compensation

We have experimentally demonstrated pulses 0.4 mJ in duration smaller than 12 fs with an excellent spatial beam profile by self-guided propagation in argon. The original 52 fs pulses from the chirped pulsed amplification laser system are first precompressed to 32 fs by inserting an acoustic optical programmable dispersive filter instrument into the laser system for spectrum reshaping and dispersion compensation, and the pulse spectrum is subsequently broadened by filamentation in an argon cell. By using chirped mirrors for post-dispersion compensation, the pulses are successfully compressed to smaller than 12 fs.

基于Nios-Ⅱ用于加速器监控系统的通用型可重配置嵌入式微控制器

FPGA and dedicated micro-controller chips are widely used in HIRFL-CSR monitor and control systems.This paper discusses the characteristics of HIRFL-CSR s dedicated micro-controllers and it s requirement for micro-controllers. Using programmable technology and Nios-Ⅱ processor,we have designed and implemented a reconfigurable embedded micro(controller in altera cycloneⅡ2c35f484 FPGA. The micro-controller which has low hardware cost and 185 MHz maximum operating frequency can replace the dedicated micro-cont...中文文摘：讨论并参考了冷却储存环目前使用的专用微控制器的特点和其对微控制器的需求,采用可编程技术和Nios-Ⅱ处理器,在altera-cycloneII2c35f484芯片内实现可重构微控制器。该微控制器硬件资源消耗少,最大工作频率可达185MHz,可代替目前在监控系统中大量使用的专用微控制器芯片,减小硬件设计复杂度、节约成本。

同步加速器高频系统前端控制器改进设计；Improvement Design of RF Front-end Controller for Synchrotron RF System

介绍了在CSR同步加速器高频控制系统改进项目中,高频前端控制器的改进设计。根据系统改进的具体要求,采用DSP+FPGA双电路板的体系结构,对高频前端控制器各个部分做了详细的设计,并给出了具体的资源消耗结果和设计图。

Development of multi-channel gated integrator and PXI-DAQ system for nuclear detector arrays

A multi-channel gated integrator and PXI based data acquisition system have been developed for nuclear detector arrays with hundreds of detector units. The multi-channel gated integrator can be controlled by a programmable Cl controller. The PXI-DAQ system consists of NI PXI-1033 chassis with several PXI-DAQ cards. The system software has a user-friendly GUI which is written in C language using LabWindows/CVI under Windows XP operating system. The performance of the PXI-DAQ system is very reliable and capable of handling event rate up to 40 kHz. (C) 2010 Elsevier B.V. All rights reserved.

CSRe团簇内靶温度闭环控制器设计；Design of Closed Loop Temperature Controller for CSRe Internal Target System

介绍了国家重大科学工程项目——兰州重离子加速器冷却存储环(HIRFL-CSR)的实验环(CSRe)团簇内靶温度闭环控制器的设计。该控制器给气体喷嘴处测温电阻提供长时间稳定度为0.1%的1mA恒定电流,通过12位ADC得到喷嘴温度,并通过混合信号处理器MSP430F149来实现制冷/加热闭环操作。在多种不同实验气体的情况下,该控制器的温度控制精度小于0.5K。目前,该控制器在现场工作良好。