115 resultados para triode-MOSFET circuits


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The wideband high-linearity mixers for a double conversion cable TV tuner is presented. The up-conversion mixer converts the input signal from 100MHz to 1000 MHz to the intermediate frequency (IF) of I GHz above. And the down-conversion mixer converts the frequency back. The degeneration resistors are used to Improve the linearity. The tuner is implemented in a 0.35 mu m SiGe technology. Input power at 1dB compression point can reach +14.23dBm. The lowest noise figure is 17.5dB. The two mixers consume 103mW under a supply voltage of 5 V.

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This paper presents the design of a wide-band low-noise amplifier (LNA) implemented in a 0.35 mu m SiGe BiCMOS technology for cable (DVB-C) and terrestrial (DVB-T) tuner applications. The LNA utilizes current injection to achieve high linearity. Without using inductors, the LNA achieves 0.1-1GHz wide bandwidth and 18.8-dB gain with less than 1.4-dB gain variation. The noise figure(NF) of the wideband LNA is 5dB, its 1-dB compression point is -2dBm and IIP3 is 8dBm. The LNA dissipates 120mW power with a 5-V supply.

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This paper represents a LC VCO with AAC (Auto Amplitude Control), in which PMOS FETs are used as active components, and the varactors are directly connected to ground to widen Kvco linear range. The AAC circuitry adds little noise to the VCO and provides it with robust performance over a wide temperature and carrier frequency range. The VCO is fabricated in 50-GHz 0.35-mu m SiGe BiCMOS process. The measurement results show that it has -127.27-dBc/Hz phase noise at 1-MHz offset and a linear gain of 32.4-MHz/V between 990-MHz and 1.14-GHz. The whole circuit draws 6.6-mA current from 5.0-V supply.

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We studied the application of Biomimetic Pattern Recognition to speaker recognition. A speaker recognition neural network using network matching degree as criterion is proposed. It has been used in the system of text-dependent speaker recognition. Experimental results show that good effect could be obtained even with lesser samples. Furthermore, the misrecognition caused by untrained speakers occurring in testing could be controlled effectively. In addition, the basic idea "cognition" of Biomimetic Pattern Recognition results in no requirement of retraining the old system for enrolling new speakers.

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With a view to solve the problems in modern information science, we put forward a new subject named High-Dimensional Space Geometrical Informatics (HDSGI). It builds a bridge between information science and point distribution analysis in high-dimensional space. A good many experimental results certified the correctness and availability of the theory of HDSGI. The proposed method for image restoration is an instance of its application in signal processing. Using an iterative "further blurring-debluring-further blurring" algorithm, the deblured image could be obtained.

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In this paper, we redefine the sample points set in the feature space from the point of view of weighted graph and propose a new covering model - Multi-Degree-of-Freedorn Neurons (MDFN). Base on this model, we describe a geometric learning algorithm with 3-degree-of-freedom neurons. It identifies the sample points secs topological character in the feature space, which is different from the traditional "separation" method. Experiment results demonstrates the general superiority of this algorithm over the traditional PCA+NN algorithm in terms of efficiency and accuracy.

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This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage Delta Sigma interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q(2) Random Walk switching scheme. The Delta Sigma interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage Delta Sigma noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-mu m CMOS technology with active area of 1.11 mm(2) including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm(2). The total power consumption of the DDFS is 200)mW with a 3.3-V power supply.

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In this paper.. the status and limits in the development of the silicon microelectronics industry are presented briefly. The key countermeasures given are use of the new structure materials and the new device structures.

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The mobility of channel electron, for partially depleted Sol nMOSFET in this paper, decreases with the increase of implanted fluorine dose in buried oxide layer. But, the experimental results also show that it is larger for the transistor corresponding to the lowest implantation dose than no implanted fluorine in buried layer. It is explained in tern-is of a "lubricant" model. Mien fluorine atoms are implanted in the top silicon layer, the mobility is the largest. In addition, a positive shift of threshold voltage has also been observed for the transistors fabricated on the Sol wafers processed by the implantation of fluorine. The causes of all the above results are discussed.

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A new material structure with Al0.22Ga0.78As/In0.15Ga0.85As/GaAs emitter spacer layer and GaAs/In0.15Ga0.85As/GaAs well for resonant tunneling diodes is designed and the corresponding device is fabricated. RTDs DC characteristics are measured at room temperature. Peak-to-valley current ratio (PVCR) is 7.44 for RTD Analysis on these results suggests that the material structure will be helpful to improve the quality, of RTD.