Phase mapping of domain kinetics in lithium niobate by digital holographic interferometry

The phase mapping of domain kinetics under the uniform steady-state electric field is achieved and investigated in the LiNbO3 crystals by digital holographic interferometry. We obtained the sequences of reconstructed three-dimensional and two-dimensional wave-field phase distributions during the electric poling in the congruent and near stoichiometric LiNbO3 crystals. The phase mapping of individual domain nucleation and growth in the two crystals are obtained. It is found that both longitudinal and lateral domain growths are not linear during the electric poling. The phase mapping of domain wall motions in the two crystals is also obtained. Both the phase relaxation and the pinning-depinning mechanism are observed during the domain wall motion. The residual phase distribution is observed after the high-speed domain wall motion. The corresponding analyses and discussions are proposed to explain the phenomena.

新型AgInSbTe相变薄膜的结晶活化能研究

利用磁控溅射法制备了新型AgInSbTe相变薄膜，热处理前后的X射线衍射(XRD)表明了薄膜在热作用下从非晶态转变到晶态．通过非晶态薄膜粉末的示差扫描量热(DSC)实验测定了不同升温速率条件下的结晶峰温度，计算了粉末的摩尔结晶活化能、原子激活能和频率因子,从结晶活化能E可以判断出新型AgInSbTe相变薄膜具有较高的结晶速度，可以用于高速可擦重写相变光盘．

A planar waveguide Nd : YAG laser using active Q-switching of a hybrid unstable resonator

A planar waveguide laser operating in a negative branch unstable resonator is Q-switched by an acoustooptic mod latorin anew configuration, providing effective, high-speed switching. The laser using a 200-mu m Nd:YAG core, face pumped by 10 laser diode bars, has produced 100-W output in a good beam quality at 100-kHz pulse rate, and 4.5 mJ at lower frequency with 15-ns pulse duration.

A novel polarization modulator for a Moire system with grating imaging

A polarization modulator based on splitting with a Savart plate and rotation of an analyzer for a moire system with grating imaging is presented, and its modulation principle is analyzed. The polarization modulator is simple and achromatic. It is composed of a polarizer, a Savart plate, and an analyzer. The polarizer and the Savart plate are placed in front of the index grating to split the image of the scale grating in the moire system. The analyzer is placed behind the grating and rotated to realize the modulation of the moire signal. The analyzer can be rotated either continually with high speed or step by step with low speed to form different modulation modes. The polarization modulator makes the moire system insensitive to the change of initial intensity. In experiments, we verified the usefulness of the polarization modulator.

偏振光斯托克斯参量的高速实时测量技术

为了满足对高速变化的偏振态的测量,提出一种能够对偏振态实现高速测量的技术。阐述了利用1/4波片与起偏器测量偏振光的斯托克斯参量常规的原理和方法,根据高速测量的要求推导出了新的斯托克斯参量计算公式,并依据此公式设计了基于多通道偏振态高速测量的方案,设计了具体的方法并编写了控制与算法程序。测试表明,该系统的测量速度达到了每秒700次偏振态测量,测量速度主要由电子线路的性能决定,测得的结果稳定可靠实现了光纤传输偏振态的高速测量。

Sub-nanosecond optical switch based on silicon racetrack resonator

We experimentally demonstrate a small-size and high-speed silicon optical switch based on the free carrier plasma dispersion in silicon. Using an embedded racetrack resonator with a quality factor of 7400, the optical switch shows an extinction ratio exceeding 13 dB with a footprint of only 2.2 x 10(-3) mm(2). Moreover, a novel pre-emphasis technique is introduced to improve the optical response performance and the rise and the fall times are reduced down to 0.24 ns and 0.42 ns respectively, which are 25% and 44% lower than those without the pre-emphasis.

Degenerate four-wave mixing based all-optical wavelength conversion in a semiconductor optical amplifier and highly-nonlinear photonic crystal fiber parametric loop mirror

The idler is separated from the co-propagating pump in a degenerate four-wave mixing (DFWM) with a symmetrical parametric loop mirror (PALM), which is composed of two identical SOAs and a 70 m highly-nonlinear photonic crystal fiber (HN-PCF). The signal and pump are coupled into the symmetrical PALM from different ports, respectively. After the DFWM based wavelength conversion (WC) in the clockwise and anticlockwise, the idler exits from the signal port, while the pump outputs from its input port. Therefore, the pump is effectively suppressed in the idler channel without a high-speed tunable filter. Contrast to a traditional PALM, the DFWM based conversion efficiency is increased greatly, and the functions of the amplification and the WC are integrated in the smart SOA and HN-PCF PALM. (C) 2008 Elsevier B.V. All rights reserved.

Smart universal multiple-valued logic gates by transferring single electrons

This paper proposes smart universal multiple-valued (MV) logic gates by transferring single electrons (SEs). The logic gates are based on MOSFET based SE turnstiles that can accurately transfer SEs with high speed at high temperature. The number of electrons transferred per cycle by the SE turnstile is a quantized function of its gate voltage, and this characteristic is fully exploited to compactly finish MV logic operations. First, we build arbitrary MV literal gates by using pairs of SE turnstiles. Then, we propose universal MV logic-to-value conversion gates and MV analog-digital conversion circuits. We propose a SPICE model to describe the behavior of the MOSFET based SE turnstile. We simulate the performances of the proposed gates. The MV logic gates have small number of transistors and low power dissipations.

A programmable SIMD vision chip for real-time vision applications

A programmable vision chip for real-time vision applications is presented. The chip architecture is a combination of a SIMD processing element array and row-parallel processors, which can perform pixel-parallel and row-parallel operations at high speed. It implements the mathematical morphology method to carry out low-level and mid-level image processing and sends out image features for high-level image processing without I/O bottleneck. The chip can perform many algorithms through software control. The simulated maximum frequency of the vision chip is 300 MHz with 16 x 16 pixels resolution. It achieves the rate of 1000 frames per second in real-time vision. A prototype chip with a 16 x 16 PE array is fabricated by the 0.18 mu m standard CMOS process. It has a pixel size of 30 mu m x 40 mu m and 8.72 mW power consumption with a 1.8 V power supply. Experiments including the mathematical morphology method and target tracking application demonstrated that the chip is fully functional and can be applied in real-time vision applications.

Ultrafast dynamics of four-state magnetization reversal in (Ga,Mn)As

The ultrafast dynamics of in-plane four-state magnetization reversal from compressively strained (Ga,Mn)As film was investigated by magneto-optical Kerr rotation measurement. The magnetization reversal signal was dramatically suppressed upon pumping, and recovered slowly with time evolution. The low switching field H-c1 increased abruptly from 30 to 108 G on the first several picoseconds and recovered back to the value before optical pumping within about 500 ps, whereas the high switching field H-c2 did not change obviously upon pumping, implying a domain-wall nucleation/propagation at low fields and coherent magnetization rotation at high fields in the magnetization reversal process.

Electron spin quantum beats and room temperature g factor in GaAsN

We report on the investigation of electron spin quantum beats at room temperature in GaAsN thin films by time-resolved Kerr rotation technique. The measurement of the quantum beats, which originate from the Larmor precession of electron spins in external transverse magnetic field, yields an accurate determination of the conduction electron g factor. We show that the g factor of GaAs1-xNx thin films is significantly changed by the introduction of a small nitrogen fraction.

Characteristic analysis of the optical delay in frequency response of resonant cavity enhanced (RCE) photodetectors

With consideration of the modulation frequency of the input lightwave itself, we present a new model to calculate the quantum efficiency of RCE p-i-n photodetectors (PD) by superimposition of multiple reflected lightwaves. For the first time, the optical delay, another important factor limiting the electrical bandwidth of RCE p-i-n PD excluding the transit time of the carriers and RCd response of the photodetector, is analyzed and discussed in detail. The optical delay dominates the bandwidth of RCE p-i-n PD when its active layer is thinner than several 10 nm. These three limiting factors must be considered exactly for design of ultra-high-speed RCE p-i-n PD.

1310 nm GaInNAs triple quantum well laser with 13 GHz modulation bandwidth

The emission wavelength of a GaInNAs quantum well (QW) laser was adjusted to 1310 nm, the zero dispersion wavelength of optical fibre, by an appropriate choice of QW composition and thickness and N concentration in the barriers. A triple QW design was employed to enable the use of a short cavity with a small photon lifetime while having sufficient differential gain for a large modulation bandwidth. High speed, ridge waveguide lasers fabricated from high quality material grown by molecular beam epitaxy exhibited a damped modulation response with a bandwidth of 13 GHz.

Fabrication and modulation characteristics of 1.3 mu m p-doped InAs quantum dot vertical cavity surface emitting lasers

We present the fabrication of 1.3 mu m waveband p-doped InAs quantum dot (QD) vertical cavity surface emitting lasers (VCSELs) with an extremely simple process. The continuous-wave saturated output power of 1.1 mW with a lasing wavelength of 1280 nm is obtained at room temperature. The high-speed modulation characteristics of p-doped QD VCSELs of two different oxide aperture sizes are investigated and compared. The maximum 3 dB modulation bandwidth of 2.5 GHz can be achieved at a bias current of 7 mA for a p-doped QD VCSEL with an oxide aperture size of 10 mu m in the small signal frequency response measurements. The crucial factors for the 3 dB bandwidth limitation are discussed according to the parameters' extraction from frequency response.

A 1,000 Frames/s Programmable Vision Chip with Variable Resolution and Row-Pixel-Mixed Parallel Image Processors

A programmable vision chip with variable resolution and row-pixel-mixed parallel image processors is presented. The chip consists of a CMOS sensor array, with row-parallel 6-bit Algorithmic ADCs, row-parallel gray-scale image processors, pixel-parallel SIMD Processing Element (PE) array, and instruction controller. The resolution of the image in the chip is variable: high resolution for a focused area and low resolution for general view. It implements gray-scale and binary mathematical morphology algorithms in series to carry out low-level and mid-level image processing and sends out features of the image for various applications. It can perform image processing at over 1,000 frames/s (fps). A prototype chip with 64 x 64 pixels resolution and 6-bit gray-scale image is fabricated in 0.18 mu m Standard CMOS process. The area size of chip is 1.5 mm x 3.5 mm. Each pixel size is 9.5 mu m x 9.5 mu m and each processing element size is 23 mu m x 29 mu m. The experiment results demonstrate that the chip can perform low-level and mid-level image processing and it can be applied in the real-time vision applications, such as high speed target tracking.