89 resultados para AC DC converter


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This paper presents a 5GHz double-balanced mixer with DC-offset cancellation circuit for direct-conversion receiver compliant with IEEE 802.11a wireless LAN standard. The analog feedback loop is used, to eliminate the DC-offset at the output of the double-balanced mixer. The test results show that the mixer with DC-offset cancellation circuit has voltage conversion gain of 9.5dB at 5.15GHz, noise figure of 13.5dB, IIP3 of 7.6 dBm, 1.73mV DC-offset voltage and 67mW power with 3.3-V power supply. The DC-offset cancellation circuit has less than 0.1mm(2) additional area and 0.3mW added power dissipation. The direct conversion WLAN receiver has been implemented in a 0.35 mu m SiGe BiCMOS technology.

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A new ECTT-DHPT with InGaAsP(lambda=1.55 mu m) as base and InGaAsP(lambda=1.3 mu m) as collector as well as waveguide was designed and fabricated, the DC characteristics reveal that the ECTT-DRPT can perform good optoelectronic mix operation and linear amplification operation by optically biased at two appropriate value respectively. Responsivity of more than 52A/W and dark current of 70nA (when V-ce=1V) were obtained.

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SOI (Silicon on Insulator) based photonic devices has attracted more and more attention in the recent years. Integration of SOI optical switch matrix with isolating grooves, total internal reflection (TIR) mirrors and spot size converter (SSC) was studied. A folding re-arrangeable non-blocking 4x4 optical switch matrix and a blocking 16x16 matrix with TIR mirrors and SSC were fabricated on SOI wafer. The performaces, including extinction ratio and the crosstalk, are better than before. The insertion loss and the polarization dependent loss (PDL) at 1.55 mu m increase slightly with longer device length, more bend and intersecting waveguides. The insertion losses decrease 2 similar to 3 dB when anti-reflection films are added in the ends of the devices. The rise and fall times of the devices are 2.1 mu s and 2.3 mu s, respectively.

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This paper presents a low-voltage, high performance charge pump circuit suitable for implementation in standard CMOS technologies. The proposed charge pump has been used as a part of the power supply section of fully integrated passive radio frequency identification(RFID) transponder IC, which has been implemented in a 0.35-um CMOS technology with embedded EEPROM offered by Chartered Semiconductor. The proposed DC/DC charge pump can generate stable output for RFID applications with low power dissipation and high pumping efficiency. The analytical model of the voltage multiplier, the comparison with other charge pumps, the simulation results, and the chip testing results are presented.

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A DC-offset cancellation scheme in the 5GHz direct-conversion receiver compliant with IEEE 802.11a wireless LAN standard is described in this paper. It uses the analog feedback loop to eliminate the DC-offset at the output of the double-balanced mixer. The mixer has a simulation voltage conversion gain of IMB at 5.2GHz, noise figure of 9.67dB, IIP3 of 7.6dBm. The solution provides 39.1dB reduction according to the leakage value at LO and mixer load resistors, the additional noise figure added to mixer is less than 0.9dB, the added power dissipation is 0.1mW and was fabricated in 60GHz 0.35 mu m SiGe BiCMOS technology.

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Submitted by 阎军 (yanj@red.semi.ac.cn) on 2010-06-04T08:02:20Z No. of bitstreams: 1 Design and Simulation Analysis of Spot-Size Converter in Silicon-On-Insulator.pdf: 239163 bytes, checksum: 82db1386c266d0c07442a972348da08c (MD5)

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目的构建HIV-1C亚型gp120负载人树突状细胞(dentriti ccell,DC)疫苗,并对其体外功能进行初步检测。方法利用Amaxa细胞核转染技术将pcDNA3.1-gp120质粒转染至人成熟DC,以Western blot检测gp120的表达。通过流式细胞仪检测DC表面共刺激分子的变化、混合淋巴细胞反应、CD8+T细胞表面活化分子CD25的表达及其分泌IFN-γ的变化。结果通过Western blot检测,gp120在DC中得到了正确表达。经流式细胞仪检测,DC表面分子CD80表达率由刺激前的33.34%上升至43.20%,CD86表达率由刺激前的60.08%上升至90.34%;负载gp120DC刺激淋巴细胞增殖率为86.72%;CD8+T细胞表面分子CD25表达率由刺激前的5.27%上升至74.21%,IFN-γ的表达率达37%。结论负载了HIV-1gp120的人树突状细胞能够显著刺激淋巴细胞的增殖、增强CD8+T细胞表面活化分子CD25表达以及促进CD8+T细胞分泌IFN-γ,为下一步DC治疗性疫苗的体内研究奠定基础。

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In this paper we report on the first results of epitaxial growth of GaN layers on GaAs (100) substrates using a modified MBE system, equipped with a DC-plasma source for nitrogen activation in configuration of reverse magnetron at ultra-low pressures.

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A fully-differential switched-capacitor sample-and-hold (S/H) circuit used in a 10-bit 50-MS/s pipeline analog-to-digital converter (ADC) was designed and fabricated using a 0.35-μm CMOS process. Capacitor fliparound architecture was used in the S/H circuit to lower the power consumption. In addition, a gain-boosted operational transconductance amplifier (OTA) was designed with a DC gain of 94 dB and a unit gain bandwidth of 460 MHz at a phase margin of 63 degree, which matches the S/H circuit. A novel double-side bootstrapped switch was used, improving the precision of the whole circuit. The measured results have shown that the S/H circuit reaches a spurious free dynamic range (SFDR) of 67 dB and a signal-to-noise ratio (SNR) of 62.1 dB for a 2.5 MHz input signal with 50 MS/s sampling rate. The 0.12 mm~2 S/H circuit operates from a 3.3 V supply and consumes 13.6 mW.

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The proposed DAC consists of a unit current-cell matrix for 8MSBs and a binary-weighted array for 4LSBs, trading-off between the precision, speed, and size of the chip. In order to ensure the linearity of the DAC, a double Centro symmetric current matrix is designed by the Q2 random walk strategy. To achieve better dynamic performance, a latch is added in front of the current switch to change the input signal, such as its optimal cross-point and voltage level. For a 12bit resolution,the converter reaches an update rate of 300MHz.

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A novel 1.55μm laser diode with spot-size converter is designed and fabricated using conventional photolithography and chemical wet etching process.For the laser diode,a ridge double-core structure is employed.For the spot-size converter,a buried ridge double-core structure is incorporated.The laterally tapered active core is designed and optically combined with the thin and wide passive core to control the size of mode.The laser diode threshold current is measured to be 40mA together with high slop efficiency of 0.35W/A.The beam divergence angles in the horizontal and vertical directions are as small as 14.89°×18.18°,respectively,resulting in low-coupling losses with a cleaved optical fiber (3dB loss).

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A novel 1.55-μm spot-size converter integrated electroabsorption modulator was designed with conventional photolithography and chemical wet etching process. A ridge double-core structure was employed for the modulator, and a buried ridge double-core structure was incorporated for the spot-size converter. The passive waveguide was optically combined with a laterally tapered active waveguide to control the mode size. The figure of merit is 4.1667 dB/V(/100 μm) and the beam divergence angles in the horizontal and vertical directions were as small as 11.2 deg. and 13.0 deg., respectively.

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A novel structure of spot-size converter is designed to allow low loss and large alignment tolerance between single-mode rib waveguide devices and fiber arrays theoretically. The spot-size converter consists of a tapered rib core region and a double-cladding region. Through optimizing parameters,an expanded mode field can be tightly confined in the inner cladding and thus radiation loss be reduced largely at the tapered region. The influence of refractive index and thickness of the inner cladding on coupling loss is analyzed in particular. A novel,easy method of fabricating tapered rib spot-size converter based on silicon-on-insulator material is proposed.

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This paper describes the high performance of narrow-beam divergence spot size converter (SSC) integrated separately confined heterostructure (SCH) LD. The upper optical confinement layer (OCL) and the butt-coupled tapered thickness waveguide were regrown simultaneously, which not only offered the separated optimization of the active region and the integrated spotsize converter, but also reduced the difficulty of the butt-joint selective regrowth. The threshold current was as low as 5.4 mA, the output power at 55 mA was 10.1 mW, the vertical and horizontal far field divergence angles were as low as 9°and 15°, and the 1-dB misalignment tolerances were 3.6 and 3.4μm, respectively.