Improvement of thin silicon on sapphire (SOS) film materials and device performances by solid phase epitaxy

The increased emphasis on sub-micron CMOS/SOS devices has placed a demand for high quality thin silicon on sapphire (SOS) films with thickness of the order 100-200 nm. It is demonstrated that the crystalline quality of as-grown thin SOS films by the CVD method can be greatly improved by solid phase epitaxy (SPE) process: implantation of self-silicon ions and subsequent thermal annealing. Subsequent regrowth of this amorphous layer leads to a greater improvement in silicon layer crystallinity and channel carrier mobility, evidenced, respectively, by double crystal X-ray diffraction and electrical measurements. We concluded that the thin SPE SOS films are suitable for application to high-performance CMOS circuitry. (C) 2000 Elsevier Science S.A. All rights reserved.

Improvement of GaN-based light emitting diodes performance grown on sapphire substrates patterned by wet etching - art. no. 684107

An effective approach to enhance the light output power of InGaN/GaN light emitting diodes (LED) was proposed using pyramidal patterned sapphire substrates (PSS). The sapphire substrates were patterned by a selective chemical wet etching technique. GaN-based LEDs were fabricated on patterned sapphire substrates through metal organic chemical deposition (MOCVD). The LEDs fabricated on patterned sapphire substrates exhibit excellent device performance compared to the conventional LEDs fabricated on planar sapphire substrates in the case of the same growth and device fabricating conditions. The light output power of the LEDs fabricated on patterned sapphire substrates was about 37% higher than that of LEDs on planar sapphire substrates at an injection current of 20 mA. The significant enhancement is attributable to the improvement of the quality of GaN-based epilayers and improvement of the light extraction efficiency by patterned sapphire substrates.

The improvement of thick oxidized porous silicon layer growth process - art. no. 60290S

Oxidizing thick porous silicon layer into silicon dioxide is a timesaving and low-cost process for producing thick silicon dioxide layer used in silicon-based optical waveguide devices. The solution of H2O2 is proposed to post-treat thick porous silicon (PS) films. The prepared PS layer as the cathode is applied about 10 mA/cm(2) current in mixture of ethanol, HF, and H2O2 solutions, in order to improve the stability and the smoothness of the surface. With the low-temperature dry-O-2 pre-oxidizations and high-temperature wet O-2 oxidizations process, a high-quality SiO2 30 mu m thickness layer that fit for the optical waveguide device was prepared. The SEM images show significant improved smoothness on the surface of oxidized PS thick films, the SiO2 film has a stable and uniformity reflex index that measured by the prism coupler, the uniformity of the reflex index in different place of the wafer is about 0.0003.

Characterization and improvement of GaAs layers grown on Si using an ultrathin a-Si film as a buffer layer

GaAs epilayers grown on Si by metalorganic chemical vapor deposition (MOCVD) using an ultrathin a-Si buffer layer were characterized by deep-level transient spectroscopy (DLTS). Six electron traps with activation energies of 0.79, 0.67, 0.61, 0.55, 0.53 and 0.32 eV below the conduction band were determined by fitting the experimental spectra. Two of the levels, C (0.61 eV) and F (0.32 eV), were first detected in GaAs epilayers on Si and identified as the metastable defects M3 and M4, respectively. In order to improve the quality of GaAs/Si epilayers, another GaAs layer was grown on the GaAs/Si epilayers grown using MOCVD. The deep levels in this regrown GaAs epilayer were also studied using DLTS. Only the EL2 level was found in the regrown GaAs epilayers. These results show that the quality of the GaAs epilayer was greatly improved by applying this growth process.

Improvement of CMOS SOS devices characteristics by a modified solid phase epitaxy

CMOS/SOS devices have lower carriers mobility and higher channel leakage current than bulk silicon CMOS devices. These mainly results from the defects of heteroepitaxial silicon film, especially from the defects near Si-Sapphire interface. This paper describes the experiment results of CMOS/SOS devices characteristics improved by a better epitaxial silicon quality which is obtained by a modified solid phase epitaxy.

Improvement of thin silicon on sapphire (SOS) film materials and device performances by solid phase epitaxy

The increased emphasis on sub-micron CMOS/SOS devices has placed a demand for high quality thin silicon on sapphire (SOS) films with thickness of the order 100-200 nm. It is demonstrated that the crystalline quality of as-grown thin SOS films by the CVD method can be greatly improved by solid phase epitaxy (SPE) process: implantation of self-silicon ions and subsequent thermal annealing. Subsequent regrowth of this amorphous layer leads to a greater improvement in silicon layer crystallinity and channel carrier mobility, evidenced, respectively, by double crystal X-ray diffraction and electrical measurements. We concluded that the thin SPE SOS films are suitable for application to high-performance CMOS circuitry. (C) 2000 Elsevier Science S.A. All rights reserved.

an analysis for understanding software security requirement methodologies

IEEE Reliabil Soc, Shanghai Jiao Tong Univ