Electrochemical detector based on sol-gel-derived carbon composite material for capillary electrophoresis microchips

An on-chip disk electrode based on sol-gel-derived carbon composite material could be easily and reproducibly fabricated. Unlike other carbon-based electrodes reported previously, this detector is rigid, convenient to fabricate, and amenable to chemical modifications. Based on the stable and reproducible characters of this detector, a copper particle-modified detector was developed for the detection of carbohydrates which extends the application of the carbon-based electrode. In our experiments, the performance of the new integrated detector for rapid on-chip measurement of epinephrine and glucose was illustrated. Experimental procedures including the fabrication of this detector, the configuration of separation channel outlet and electrode verge, and the performance characteristics of this new electrochemical detector were investigated.

Compact SOI arrayed waveguide grating demultiplexer with broad spectral response

A compact eight-channel flat spectral response arrayed waveguide grating (AWG) multiplexer based on siliconon-insulator (SOI) materials has been fabricated on the planar lightwave circuit (PLC). The 1-dB bandwidth of 48 GHz and 3-dB bandwidth of 69 GHz are obtained for the 100 GHz channel spacing. Not only non-adjacent crosstalk but also adjacent crosstalk are less than -25 dB. The on-chip propagation loss range is from 3.5 to 3.9 dB, and the 2 total device size is 1.5 x 1.0 cm(2). (c) 2005 Elsevier B.V. All rights reserved.

A 5.6-mW Power Dissipation CMOS Frequency Synthesizer for L1/L2 Dual-Band GPS Application

This paper presents a wide tuning range CMOS frequency synthesizer for dual-band GPS receiver, which has been fabricated in a standard 0.18-um RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows a tuning range from 2 to 3.6GHz to cover 2.45GHz and 3.14GHz in case of process corner or temperature variation, with a current consumption varying accordingly from 0.8mA to 0.4mA, from a 1.8V supply voltage. The measurement results show that the whole frequency synthesizer costs a very low power consumption of 5.6mW working at L I band with in-band phase noise less than -82dBc/Hz and out-of-band phase noise about -112 dBc/Hz at 1MHz offset from a 3.142GHz carrier.

A widely tunable continuous-time LPF for a direct conversion DBS Tuner

A continuous-time 7th-order Butterworth Gm-C low pass filter (LPF) with on-chip automatic tuning circuit has been implemented for a direct conversion DBS tuner in a 0.35um SiGe BiCMOS technology. The filter's -3dB cutoff frequency f(0) can be tuned from 4MHz to 40MHz. A novel translinear transconductor (Gm) cell is used to implement the widely tunable and high linear filter. The filter has -0.5dB passband gain, 28nV/Hz(1/2) input referred noise, -2dBVrms passband IIP3, 24dBVrms stopband IIP3. The I/Q LPFs with the tuning circuit draw 16mA (with f(0)=20MHz) from 3.3 V supply, and occupy an area of 0.45 mm(2).

A low power integrated CMOS transmitter for BCI system

The prototype wafer of a low power integrated CMOS Transmitter for short-range biotelemetry application has been designed and fabricated, which is prospective to be implanted in the human brain to transfer the extracted neural information to the external computer. The transmitter consists of five parts, a bandgap current regulator, a ring oscillator, a buffer, a modulator and a power transistor. High integration and low power are the most distinct criteria for such an implantable integrated circuit. The post-simulation results show that under a 3.3 V power supply the transmitter provides 100.1 MHz half-wave sinusoid current signal to drive the off-chip antenna, the output peak current range is -0.155 mA similar to 1.250 mA, and on-chip static power dissipation is low to 0.374 mW. All the performances of the transmitter satisfy the demands of wireless real-time BCI system for neural signals recording and processing.

A widely tunable continuous-time LPF for a direct conversion DBS tuner

A continuous-time 7th-order Butterworth Gm-C low pass filter (LPF) with on-chip automatic tuning circuit has been implemented for a direct conversion DBS tuner in 0.35μm SiGe BiCMOS technology. The filter's -3 dB cutoff frequency f0 can be tuned from 4 to 40 MHz. A novel on-chip automatic tuning scheme has been successfully realized to tune and lock the filter's cutoff frequency. Measurement results show that the filter has -0.5 dB passband gain, +/- 5% bandwidth accuracy, 30 nV/Hz~(1/2) input referred noise, -3 dBVrms passband IIP3, and 27 dBVrms stopband IIP3. The I/Q LPFs with the tuning circuit draw 13 mA (with f_0 = 20 MHz) from 5 V supply, and occupy 0.5 mm~2.

面向硅基光互连应用的无源光子集成器件研究进展

光互连是突破传统微电子IC性能瓶颈的重要技术手段,对推进"后摩尔时代"微电子技术的发展和高性能计算技术的实现具有关键性意义.本文在归纳总结不同层次光互连结构特点的基础上,对片上光互连(on-chip or intra-chip optical interconnects)所涉及的若干种无源光子集成器件的设计制备及性能特点进行了分析介绍,这些器件包括SOI亚波长光子线波导、SOI光子晶体波导、MMI分束/合束器、微环/微盘谐振腔滤波器、光子晶体微腔耦合滤波器、光子晶体反射镜等,是硅基片上光互连的基本构成单元.本文对这些关键性光子集成器件的国内最新研究进展进行了报道.

A Low Power Dissipation Wide-Band CMOS Frequency Synthesizer for a Dual-Band GPS Receiver

This paper presents a wide tuning range CMOS frequency synthesizer for a dual-band GPS receiver,which has been fabricated in a standard 0.18μm RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows a tuning range from 2 to 3.6GHz to cover 2.45 and 3.14GHz in case of process corner or temperature variation,with a current consumption varying accordingly from 0.8 to 0.4mA,from a 1.8V supply voltage. Measurement results show that the whole frequency synthesizer consumes very low power of 5.6mW working at L1 band with in-band phase noise less than - 82dBc/Hz and out-of-band phase noise about - ll2dBc/Hz at 1MHz offset from a 3. 142GHz carrier. The performance of the frequency synthesizer meets the requirements of GPS applications very well.

A Compact Direct Digital Frequency Synthesizer for the Rubidium Atomic Frequency Standard

A compact direct digital frequency synthesizer （DDFS） for system-on-chip implementation of the high precision rubidium atomic frequency standard is developed. For small chip size and low power consumption, the phase to sine mapping data is compressed using sine symmetry technique, sine-phase difference technique, quad line approximation technique,and quantization and error read only memory （QE-ROM） technique. The ROM size is reduced by 98% using these techniques. A compact DDFS chip with 32bit phase storage depth and a 10bit on-chip digital to analog converter has been successfully implemented using a standard 0.35μm CMOS process. The core area of the DDFS is 1.6mm^2. It consumes 167mW at 3.3V,and its spurious free dynamic range is 61dB.

动态参数模型确定SoC中异步FIFO深度的方法

针对超大规模集成电路和片上系统设计中确定异步FIFO浓度的问题,根据异步FIFO运行时的属性提出FIFO动态参数模型,该模型包括FIFO饱和度、写入端和读出端数据传输率及上溢/下溢频率。在该模型的基础之上,分析异步FIFO的深度与动态参数之间的关系,采用功能仿真方法确定片上系统中异步模块之间数据传输所需FIFO的深度。对典型实例的分析表明,采用这种方法能够在保证系统数据通信性能的前提下,获得最小的FIFO深度,优化系统资源的使用。

网络环境下基于Agent的多机器人协调与路径规划

本文针对基于Ａｇｅｎｔ的分布协作式多机器人装配系统——ＤＡＭＡＳ的特点，在原有工作的基础上，提出了网络环境下基于Ａｇｅｎｔ的路径规划思想，重新定义Ａｇｅｎｔ各功能模块的内容，建立系统中的通讯机制．同时，介绍了系统进行路径规划的工作过程，给出了路径规划器的规划算法

海上时移地震综合解释技术研究与应用

The practical application and development of the time-lapse seismic reservoir monitor technology has indicated which has already become one of most important development technologies in seeking the surplus oil distribution and improving the reservoir recovering. The paper, first obtained the rock physics experiment analysis data according to the Bohai Sea loose sandstone in-situ measure technical, and determined the feasibility research of the S oil-field on the time-lapse seismic reservoir monitoring combining with the time-lapse numeric simulation technology, which was used to analyze the time-lapse seismic respond raw of the reservoir parameters change and pointed out the attentive problems during the real time-lapse seismic processing and interpretation. Next, simply introduced the technical link and the effect of the time-lapse mutual constrained fidelity and match processing aiming at the local complex gathering condition, geological condition, development engineering condition. Third, introduced the time-lapse integrated interpretation and the technical system with the innovative key technology that includes the time-lapse difference explanation technology, the time-lapse seismic multi-attributes integrated interpretation technology, and the time-lapse constrained reservoir parameters inversion technology, and so on. Using the time-lapse difference direct explanation technology, directly obtained the surplus oil macroscopic distribution through the difference seismic data; Using the presenting 8 big principles of the sublayer isochronisms comparison, carried on the time-lapse integrated interpretation analysis on the fine sublayer comparison and the thin oil-layer(group) contrast and the oil layer (group); The paper putted up the research, contrast, applications of the multi-sides sensitive attribute analysis and the RBF nerve network on the nearest study algorithm, and predicted the reservoir parameters and the surplus oil distribution with them; Combining with innovative researches and the time-lapse seismic constrained reservoir parameters inversion technology realized the good combination of the seismic and the reservoir engineering. Fourth, under fully analyzing the geology condition, the reservoir condition, the exploit dynamic data, and the seismic data of the S oil-field, and analyzing the time-lapse difference factors with reservoir dynamic exploit data, calibrated the oil-gas saturation change, the pressure change, the water saturation change, and determined the rationality of the time-lapse seismic difference, and finally obtained the surplus oil distribution, the water flood characteristic understanding, reservoir degasification, and pressure drop raw, and so on, which had been used in the well pattern tightening plan proof of the S oil-field development adjustment plan. Finally, the paper summarized the knowledge and understanding of the marine time-lapse seismic integrated interpretation, also had pointed out the further need researched question.

Nanoelectrode ensembles based on semi-interpenetrating network of carbon nanotubes

A method for preparing nanoelectrode ensembles based on semi-interpenetrating network (SIN) of multi-walled carbon nanotubes (MWNTs) on gold electrode through phase-separation method is initially proposed. Individual nanoelectrode owns irregular three-dimensional MWNTs networks, which is denoted as SIN-MWNTs. On the as-prepared SIN-MWNTs nanoelectrode ensembles, the assembled MWNTs clusters in nanoscale serve as individual nanoelectrode and the electroinactive lipid networks located on the top of alkanethiol monolayer are used as a shielding layer. Cyclic voltammetry (CV), electrochemical impedance spectroscopy (EIS), tapping-mode atomic force microscopy (TM-AFM) and scanning electron microscopy (SEM) were used to characterize the as-prepared SIN-MWNT nanoelectrode ensembles. Experimental results indicate that the well-defined nanoelectrode ensembles were prepared through self-assembly technology. Meantime, sigmoid curves in a wide scanning range can be obtained in CV experiments. This study may pave the way for the construction of truly nanoscopic nanoelectrode arrays by bottom-up strategy.

Freestanding optical fibers fabricated in a glass chip by femtosecond laser micromachining for lab-on-a-chip application (vol 13, pg 7225, 2005)

An erratum is presented to correct the propagation loss of the freestanding optical fibers fabricated in glass chip. (c) 2006 Optical Society of America.

Guiding neutral atoms with two current-carrying wires and a vertical bias field on the atom chip

We demonstrate the guiding of neutral atoms with two parallel microfabricated current-carrying wires on the atom chip and a vertical magnetic bias field. The atoms are guided along a magnetic field minimum parallel to the current-carrying wires and confined in the other two directions. We describe in detail how the precooled atoms are efficiently loaded into the two-wire guide. We present a detailed experimental study of the motional properties of the atoms in the guide and the relationship between the location of the guide and the vertical bias field. This two-wire guide with vertical bias field can be used to realize large area atom interferometer.